Move platform opensbi functions to sbi_platform_operations structure.
Both sbi_platform and sbi_platform_operations structures are maintained
by platform vendors.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
#define SBI_PLATFORM_HART_COUNT_OFFSET (0x48)
/** Offset of hart_stack_size in struct sbi_platform */
#define SBI_PLATFORM_HART_STACK_SIZE_OFFSET (0x4c)
+/** Offset of disabled_hart_mask in struct sbi_platform */
+#define SBI_PLATFORM_DISABLED_HART_OFFSET (0x50)
+/** Offset of platform_ops_addr in struct sbi_platform */
+#define SBI_PLATFORM_OPS_OFFSET (0x58)
#ifndef __ASSEMBLY__
SBI_PLATFORM_HAS_SCOUNTEREN | SBI_PLATFORM_HAS_MCOUNTEREN | \
SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
-/** Representation of a platform */
-struct sbi_platform {
- /** Name of the platform */
- char name[64];
- /** Supported features */
- u64 features;
- /** Total number of HARTs */
- u32 hart_count;
- /** Per-HART stack size for exception/interrupt handling */
- u32 hart_stack_size;
- /** Mask representing the set of disabled HARTs */
- u64 disabled_hart_mask;
-
+/** Platform functions */
+struct sbi_platform_operations {
/** Platform early initialization */
int (*early_init)(bool cold_boot);
/** Platform final initialization */
int (*system_shutdown)(u32 type);
} __packed;
+/** Representation of a platform */
+struct sbi_platform {
+ /** Name of the platform */
+ char name[64];
+ /** Supported features */
+ u64 features;
+ /** Total number of HARTs */
+ u32 hart_count;
+ /** Per-HART stack size for exception/interrupt handling */
+ u32 hart_stack_size;
+ /** Mask representing the set of disabled HARTs */
+ u64 disabled_hart_mask;
+ /** Pointer to sbi platform operations */
+ unsigned long platform_ops_addr;
+} __packed;
+
/** Get pointer to sbi_platform for sbi_scratch pointer */
#define sbi_platform_ptr(__s) \
((const struct sbi_platform *)((__s)->platform_addr))
/** Get pointer to sbi_platform for current HART */
#define sbi_platform_thishart_ptr() \
((const struct sbi_platform *)(sbi_scratch_thishart_ptr() \
- ->platform_addr))
+ >platform_addr))
+/** Get pointer to platform_ops_addr from platform pointer **/
+#define sbi_platform_ops(__p) \
+ ((const struct sbi_platform_operations *)(__p)->platform_ops_addr)
+
/** Check whether the platform supports timer value */
#define sbi_platform_has_timer_value(__p) \
((__p)->features & SBI_PLATFORM_HAS_TIMER_VALUE)
static inline int sbi_platform_early_init(const struct sbi_platform *plat,
bool cold_boot)
{
- if (plat && plat->early_init)
- return plat->early_init(cold_boot);
+ if (plat && sbi_platform_ops(plat)->early_init)
+ return sbi_platform_ops(plat)->early_init(cold_boot);
return 0;
}
static inline int sbi_platform_final_init(const struct sbi_platform *plat,
bool cold_boot)
{
- if (plat && plat->final_init)
- return plat->final_init(cold_boot);
+ if (plat && sbi_platform_ops(plat)->final_init)
+ return sbi_platform_ops(plat)->final_init(cold_boot);
return 0;
}
static inline u32 sbi_platform_pmp_region_count(const struct sbi_platform *plat,
u32 hartid)
{
- if (plat && plat->pmp_region_count)
- return plat->pmp_region_count(hartid);
+ if (plat && sbi_platform_ops(plat)->pmp_region_count)
+ return sbi_platform_ops(plat)->pmp_region_count(hartid);
return 0;
}
* @return 0 on success and negative error code on failure
*/
static inline int sbi_platform_pmp_region_info(const struct sbi_platform *plat,
- u32 hartid, u32 index,
- ulong *prot, ulong *addr,
- ulong *log2size)
+ u32 hartid, u32 index,
+ ulong *prot, ulong *addr,
+ ulong *log2size)
{
- if (plat && plat->pmp_region_info)
- return plat->pmp_region_info(hartid, index, prot, addr,
- log2size);
+ if (plat && sbi_platform_ops(plat)->pmp_region_info)
+ return sbi_platform_ops(plat)->pmp_region_info(hartid, index, prot, addr,
+ log2size);
return 0;
}
* @param ch character to write
*/
static inline void sbi_platform_console_putc(const struct sbi_platform *plat,
- char ch)
+ char ch)
{
- if (plat && plat->console_putc)
- plat->console_putc(ch);
+ if (plat && sbi_platform_ops(plat)->console_putc)
+ sbi_platform_ops(plat)->console_putc(ch);
}
/**
*/
static inline int sbi_platform_console_getc(const struct sbi_platform *plat)
{
- if (plat && plat->console_getc)
- return plat->console_getc();
+ if (plat && sbi_platform_ops(plat)->console_getc)
+ return sbi_platform_ops(plat)->console_getc();
return -1;
}
*/
static inline int sbi_platform_console_init(const struct sbi_platform *plat)
{
- if (plat && plat->console_init)
- return plat->console_init();
+ if (plat && sbi_platform_ops(plat)->console_init)
+ return sbi_platform_ops(plat)->console_init();
return 0;
}
static inline int sbi_platform_irqchip_init(const struct sbi_platform *plat,
bool cold_boot)
{
- if (plat && plat->irqchip_init)
- return plat->irqchip_init(cold_boot);
+ if (plat && sbi_platform_ops(plat)->irqchip_init)
+ return sbi_platform_ops(plat)->irqchip_init(cold_boot);
return 0;
}
static inline void sbi_platform_ipi_send(const struct sbi_platform *plat,
u32 target_hart)
{
- if (plat && plat->ipi_send)
- plat->ipi_send(target_hart);
+ if (plat && sbi_platform_ops(plat)->ipi_send)
+ sbi_platform_ops(plat)->ipi_send(target_hart);
}
/**
static inline void sbi_platform_ipi_sync(const struct sbi_platform *plat,
u32 target_hart)
{
- if (plat && plat->ipi_sync)
- plat->ipi_sync(target_hart);
+ if (plat && sbi_platform_ops(plat)->ipi_sync)
+ sbi_platform_ops(plat)->ipi_sync(target_hart);
}
/**
static inline void sbi_platform_ipi_clear(const struct sbi_platform *plat,
u32 target_hart)
{
- if (plat && plat->ipi_clear)
- plat->ipi_clear(target_hart);
+ if (plat && sbi_platform_ops(plat)->ipi_clear)
+ sbi_platform_ops(plat)->ipi_clear(target_hart);
}
/**
static inline int sbi_platform_ipi_init(const struct sbi_platform *plat,
bool cold_boot)
{
- if (plat && plat->ipi_init)
- return plat->ipi_init(cold_boot);
+ if (plat && sbi_platform_ops(plat)->ipi_init)
+ return sbi_platform_ops(plat)->ipi_init(cold_boot);
return 0;
}
*/
static inline u64 sbi_platform_timer_value(const struct sbi_platform *plat)
{
- if (plat && plat->timer_value)
- return plat->timer_value();
+ if (plat && sbi_platform_ops(plat)->timer_value)
+ return sbi_platform_ops(plat)->timer_value();
return 0;
}
static inline void
sbi_platform_timer_event_start(const struct sbi_platform *plat, u64 next_event)
{
- if (plat && plat->timer_event_start)
- plat->timer_event_start(next_event);
+ if (plat && sbi_platform_ops(plat)->timer_event_start)
+ sbi_platform_ops(plat)->timer_event_start(next_event);
}
/**
static inline void
sbi_platform_timer_event_stop(const struct sbi_platform *plat)
{
- if (plat && plat->timer_event_stop)
- plat->timer_event_stop();
+ if (plat && sbi_platform_ops(plat)->timer_event_stop)
+ sbi_platform_ops(plat)->timer_event_stop();
}
/**
static inline int sbi_platform_timer_init(const struct sbi_platform *plat,
bool cold_boot)
{
- if (plat && plat->timer_init)
- return plat->timer_init(cold_boot);
+ if (plat && sbi_platform_ops(plat)->timer_init)
+ return sbi_platform_ops(plat)->timer_init(cold_boot);
return 0;
}
static inline int sbi_platform_system_reboot(const struct sbi_platform *plat,
u32 type)
{
- if (plat && plat->system_reboot)
- return plat->system_reboot(type);
+ if (plat && sbi_platform_ops(plat)->system_reboot)
+ return sbi_platform_ops(plat)->system_reboot(type);
return 0;
}
static inline int sbi_platform_system_shutdown(const struct sbi_platform *plat,
u32 type)
{
- if (plat && plat->system_shutdown)
- return plat->system_shutdown(type);
+ if (plat && sbi_platform_ops(plat)->system_shutdown)
+ return sbi_platform_ops(plat)->system_shutdown(type);
return 0;
}
/*
* Platform descriptor.
*/
-const struct sbi_platform platform = {
- .name = "ARIANE RISC-V",
- .features = SBI_ARIANE_FEATURES,
- .hart_count = ARIANE_HART_COUNT,
- .hart_stack_size = 4096,
- .disabled_hart_mask = 0,
+const struct sbi_platform_operations platform_ops = {
.early_init = ariane_early_init,
.final_init = ariane_final_init,
.console_init = ariane_console_init,
.system_reboot = ariane_system_reboot,
.system_shutdown = ariane_system_shutdown
};
+
+const struct sbi_platform platform = {
+ .name = "ARIANE RISC-V",
+ .features = SBI_ARIANE_FEATURES,
+ .hart_count = ARIANE_HART_COUNT,
+ .hart_stack_size = 4096,
+ .disabled_hart_mask = 0,
+ .platform_ops_addr = (unsigned long)&platform_ops
+};
return 0;
}
-const struct sbi_platform platform = {
-
- .name = "Kendryte K210",
- .features = SBI_PLATFORM_HAS_TIMER_VALUE,
-
- .hart_count = K210_HART_COUNT,
- .hart_stack_size = K210_HART_STACK_SIZE,
- .disabled_hart_mask = 0,
-
- .console_init = k210_console_init,
- .console_putc = k210_console_putc,
- .console_getc = k210_console_getc,
+const struct sbi_platform_operations platform_ops = {
+ .console_init = k210_console_init,
+ .console_putc = k210_console_putc,
+ .console_getc = k210_console_getc,
.irqchip_init = k210_irqchip_init,
.system_reboot = k210_system_reboot,
.system_shutdown = k210_system_shutdown
};
+
+const struct sbi_platform platform = {
+ .name = "Kendryte K210",
+ .features = SBI_PLATFORM_HAS_TIMER_VALUE,
+ .hart_count = K210_HART_COUNT,
+ .hart_stack_size = K210_HART_STACK_SIZE,
+ .disabled_hart_mask = 0,
+ .platform_ops_addr = (unsigned long)&platform_ops
+};
return 0;
}
+const struct sbi_platform_operations platform_ops = {
+ .pmp_region_count = sifive_u_pmp_region_count,
+ .pmp_region_info = sifive_u_pmp_region_info,
+ .final_init = sifive_u_final_init,
+ .console_putc = sifive_uart_putc,
+ .console_getc = sifive_uart_getc,
+ .console_init = sifive_u_console_init,
+ .irqchip_init = sifive_u_irqchip_init,
+ .ipi_send = clint_ipi_send,
+ .ipi_sync = clint_ipi_sync,
+ .ipi_clear = clint_ipi_clear,
+ .ipi_init = sifive_u_ipi_init,
+ .timer_value = clint_timer_value,
+ .timer_event_stop = clint_timer_event_stop,
+ .timer_event_start = clint_timer_event_start,
+ .timer_init = sifive_u_timer_init,
+ .system_reboot = sifive_u_system_down,
+ .system_shutdown = sifive_u_system_down
+};
+
const struct sbi_platform platform = {
- .name = "QEMU SiFive Unleashed",
- .features = SBI_PLATFORM_DEFAULT_FEATURES,
- .hart_count = SIFIVE_U_HART_COUNT,
- .hart_stack_size = SIFIVE_U_HART_STACK_SIZE,
- .disabled_hart_mask = 0,
- .pmp_region_count = sifive_u_pmp_region_count,
- .pmp_region_info = sifive_u_pmp_region_info,
- .final_init = sifive_u_final_init,
- .console_putc = sifive_uart_putc,
- .console_getc = sifive_uart_getc,
- .console_init = sifive_u_console_init,
- .irqchip_init = sifive_u_irqchip_init,
- .ipi_send = clint_ipi_send,
- .ipi_sync = clint_ipi_sync,
- .ipi_clear = clint_ipi_clear,
- .ipi_init = sifive_u_ipi_init,
- .timer_value = clint_timer_value,
- .timer_event_stop = clint_timer_event_stop,
- .timer_event_start = clint_timer_event_start,
- .timer_init = sifive_u_timer_init,
- .system_reboot = sifive_u_system_down,
- .system_shutdown = sifive_u_system_down
+ .name = "QEMU SiFive Unleashed",
+ .features = SBI_PLATFORM_DEFAULT_FEATURES,
+ .hart_count = SIFIVE_U_HART_COUNT,
+ .hart_stack_size = SIFIVE_U_HART_STACK_SIZE,
+ .disabled_hart_mask = 0,
+ .platform_ops_addr = (unsigned long)&platform_ops
};
return 0;
}
+const struct sbi_platform_operations platform_ops = {
+ .pmp_region_count = virt_pmp_region_count,
+ .pmp_region_info = virt_pmp_region_info,
+ .final_init = virt_final_init,
+ .console_putc = uart8250_putc,
+ .console_getc = uart8250_getc,
+ .console_init = virt_console_init,
+ .irqchip_init = virt_irqchip_init,
+ .ipi_send = clint_ipi_send,
+ .ipi_sync = clint_ipi_sync,
+ .ipi_clear = clint_ipi_clear,
+ .ipi_init = virt_ipi_init,
+ .timer_value = clint_timer_value,
+ .timer_event_stop = clint_timer_event_stop,
+ .timer_event_start = clint_timer_event_start,
+ .timer_init = virt_timer_init,
+ .system_reboot = virt_system_down,
+ .system_shutdown = virt_system_down
+};
+
const struct sbi_platform platform = {
- .name = "QEMU Virt Machine",
- .features = SBI_PLATFORM_DEFAULT_FEATURES,
- .hart_count = VIRT_HART_COUNT,
- .hart_stack_size = VIRT_HART_STACK_SIZE,
- .disabled_hart_mask = 0,
- .pmp_region_count = virt_pmp_region_count,
- .pmp_region_info = virt_pmp_region_info,
- .final_init = virt_final_init,
- .console_putc = uart8250_putc,
- .console_getc = uart8250_getc,
- .console_init = virt_console_init,
- .irqchip_init = virt_irqchip_init,
- .ipi_send = clint_ipi_send,
- .ipi_sync = clint_ipi_sync,
- .ipi_clear = clint_ipi_clear,
- .ipi_init = virt_ipi_init,
- .timer_value = clint_timer_value,
- .timer_event_stop = clint_timer_event_stop,
- .timer_event_start = clint_timer_event_start,
- .timer_init = virt_timer_init,
- .system_reboot = virt_system_down,
- .system_shutdown = virt_system_down
+ .name = "QEMU Virt Machine",
+ .features = SBI_PLATFORM_DEFAULT_FEATURES,
+ .hart_count = VIRT_HART_COUNT,
+ .hart_stack_size = VIRT_HART_STACK_SIZE,
+ .disabled_hart_mask = 0,
+ .platform_ops_addr = (unsigned long)&platform_ops
};
return 0;
}
+const struct sbi_platform_operations platform_ops = {
+ .pmp_region_count = fu540_pmp_region_count,
+ .pmp_region_info = fu540_pmp_region_info,
+ .final_init = fu540_final_init,
+ .console_putc = sifive_uart_putc,
+ .console_getc = sifive_uart_getc,
+ .console_init = fu540_console_init,
+ .irqchip_init = fu540_irqchip_init,
+ .ipi_send = clint_ipi_send,
+ .ipi_sync = clint_ipi_sync,
+ .ipi_clear = clint_ipi_clear,
+ .ipi_init = fu540_ipi_init,
+ .timer_value = clint_timer_value,
+ .timer_event_stop = clint_timer_event_stop,
+ .timer_event_start = clint_timer_event_start,
+ .timer_init = fu540_timer_init,
+ .system_reboot = fu540_system_down,
+ .system_shutdown = fu540_system_down
+};
+
const struct sbi_platform platform = {
- .name = "SiFive Freedom U540",
- .features = SBI_PLATFORM_DEFAULT_FEATURES,
- .hart_count = FU540_HART_COUNT,
- .hart_stack_size = FU540_HART_STACK_SIZE,
- .disabled_hart_mask = FU540_HARITD_DISABLED,
- .pmp_region_count = fu540_pmp_region_count,
- .pmp_region_info = fu540_pmp_region_info,
- .final_init = fu540_final_init,
- .console_putc = sifive_uart_putc,
- .console_getc = sifive_uart_getc,
- .console_init = fu540_console_init,
- .irqchip_init = fu540_irqchip_init,
- .ipi_send = clint_ipi_send,
- .ipi_sync = clint_ipi_sync,
- .ipi_clear = clint_ipi_clear,
- .ipi_init = fu540_ipi_init,
- .timer_value = clint_timer_value,
- .timer_event_stop = clint_timer_event_stop,
- .timer_event_start = clint_timer_event_start,
- .timer_init = fu540_timer_init,
- .system_reboot = fu540_system_down,
- .system_shutdown = fu540_system_down
+ .name = "SiFive Freedom U540",
+ .features = SBI_PLATFORM_DEFAULT_FEATURES,
+ .hart_count = FU540_HART_COUNT,
+ .hart_stack_size = FU540_HART_STACK_SIZE,
+ .disabled_hart_mask = FU540_HARITD_DISABLED,
+ .platform_ops_addr = (unsigned long)&platform_ops
};
* Include these files as needed.
* See config.mk PLATFORM_xxx configuration parameters.
*/
-#include <plat/irqchip/plic.h>
-#include <plat/serial/uart8250.h>
-#include <plat/sys/clint.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/serial/uart8250.h>
+#include <sbi_utils/sys/clint.h>
/*
* Platform early initialization.
/*
* Platform descriptor.
*/
+const struct sbi_platform_operations platform_ops = {
+ .early_init = platform_early_init,
+ .final_init = platform_final_init,
+ .pmp_region_count = platform_pmp_region_count,
+ .pmp_region_info = platform_pmp_region_info,
+ .console_putc = platform_console_putc,
+ .console_getc = platform_console_getc,
+ .console_init = platform_console_init,
+ .irqchip_init = platform_irqchip_init,
+ .ipi_send = platform_ipi_send,
+ .ipi_sync = platform_ipi_sync,
+ .ipi_clear = platform_ipi_clear,
+ .ipi_init = platform_ipi_init,
+ .timer_value = platform_timer_value,
+ .timer_event_stop = platform_timer_event_stop,
+ .timer_event_start = platform_timer_event_start,
+ .timer_init = platform_timer_init,
+ .system_reboot = platform_system_down,
+ .system_shutdown = platform_system_down
+};
const struct sbi_platform platform = {
-
- .name = "platform-name",
- .features = SBI_PLATFORM_DEFAULT_FEATURES,
- .hart_count = 1,
- .hart_stack_size = 4096,
- .disabled_hart_mask = 0,
-
- .early_init = platform_early_init,
- .final_init = platform_final_init,
-
- .pmp_region_count = platform_pmp_region_count,
- .pmp_region_info = platform_pmp_region_info,
-
- .console_init = platform_console_init,
- .console_putc = platform_console_putc,
- .console_getc = platform_console_getc,
-
- .irqchip_init = platform_irqchip_init,
- .ipi_init = platform_ipi_init,
- .ipi_send = platform_ipi_send,
- .ipi_sync = platform_ipi_sync,
- .ipi_clear = platform_ipi_clear,
-
- .timer_init = platform_timer_init,
- .timer_value = platform_timer_value,
- .timer_event_start = platform_timer_event_start,
- .timer_event_stop = platform_timer_event_stop,
-
- .system_reboot = platform_system_reboot,
- .system_shutdown = platform_system_shutdown
+ .name = "platform-name",
+ .features = SBI_PLATFORM_DEFAULT_FEATURES,
+ .hart_count = 1,
+ .hart_stack_size = 4096,
+ .disabled_hart_mask = 0,
+ .platform_ops_addr = (unsigned long)&platform_ops
};