x86 - add speculation_barrier pattern 73/198473/3
authorrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 1 Aug 2018 08:16:38 +0000 (08:16 +0000)
committerDongkyun Son <dongkyun.s@samsung.com>
Wed, 6 Feb 2019 15:56:35 +0000 (15:56 +0000)
This patch adds a speculation barrier for x86, based on my
understanding of the required mitigation for that CPU, which is to use
an lfence instruction.

This patch needs some review by an x86 expert and if adjustments are
needed, I'd appreciate it if they could be picked up by the port
maintainer.  This is supposed to serve as an example of how to deploy
the new __builtin_speculation_safe_value() intrinsic on this
architecture.

* config/i386/i386.md (unspecv): Add UNSPECV_SPECULATION_BARRIER.
(speculation_barrier): New insn.

(backported 5812770a029b1a49b72cabf08b2f202d2d00dc69)

Change-Id: I94d1aacb04c9288a0fbeb38109aeb80a59ca47e6
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@263196 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/i386/i386.md

index d8ad496..b5383da 100644 (file)
@@ -1,3 +1,8 @@
+2018-08-01  Richard Earnshaw  <rearnsha@arm.com>
+
+       * config/i386/i386.md (unspecv): Add UNSPECV_SPECULATION_BARRIER.
+       (speculation_barrier): New insn.
+
 2018-07-31  Ian Lance Taylor  <iant@golang.org>
 
        * targhooks.c (default_have_speculation_safe_value): Add
index 46987d3..593866f 100644 (file)
 
   ;; For RDPKRU and WRPKRU support
   UNSPECV_PKU
+
+  ;; For Speculation Barrier support
+  UNSPECV_SPECULATION_BARRIER
 ])
 
 ;; Constants to represent rounding modes in the ROUND instruction
   "wrpkru"
   [(set_attr "type" "other")])
 
+(define_insn "speculation_barrier"
+  [(unspec_volatile [(const_int 0)] UNSPECV_SPECULATION_BARRIER)]
+  ""
+  "lfence"
+  [(set_attr "type" "other")
+   (set_attr "length" "3")])
+
 (include "mmx.md")
 (include "sse.md")
 (include "sync.md")