#include "brw_compiler.h"
#include "brw_shader.h"
+#include "brw_eu.h"
#include "common/gen_debug.h"
#include "compiler/nir/nir.h"
#include "main/errors.h"
brw_fs_alloc_reg_sets(compiler);
brw_vec4_alloc_reg_set(compiler);
+ brw_init_compaction_tables(devinfo);
compiler->precise_trig = env_var_as_boolean("INTEL_PRECISE_TRIG", false);
p->loop_stack_array_size = 16;
p->loop_stack = rzalloc_array(mem_ctx, int, p->loop_stack_array_size);
p->if_depth_in_loop = rzalloc_array(mem_ctx, int, p->loop_stack_array_size);
-
- brw_init_compaction_tables(devinfo);
}
#include "brw_shader.h"
#include "intel_asm_annotation.h"
#include "common/gen_debug.h"
-#include "util/u_atomic.h" /* for p_atomic_cmpxchg */
static const uint32_t g45_control_index_table[32] = {
0b00000000000000000,
void
brw_init_compaction_tables(const struct gen_device_info *devinfo)
{
- static bool initialized;
- if (initialized || p_atomic_cmpxchg(&initialized, false, true) != false)
- return;
-
assert(g45_control_index_table[ARRAY_SIZE(g45_control_index_table) - 1] != 0);
assert(g45_datatype_table[ARRAY_SIZE(g45_datatype_table) - 1] != 0);
assert(g45_subreg_table[ARRAY_SIZE(g45_subreg_table) - 1] != 0);