#include <linux/sched/signal.h>
#include <linux/sizes.h>
#include <linux/slab.h>
+#include <linux/module.h>
#include "tb.h"
u32 status;
};
+static bool clx_enabled = true;
+module_param_named(clx, clx_enabled, bool, 0444);
+MODULE_PARM_DESC(clx, "allow low power states on the high-speed lanes (default: true)");
+
/*
* Hold NVM authentication failure status per switch This information
* needs to stay around even when the switch gets power cycled so we
{
struct tb_switch *root_sw = sw->tb->root_switch;
+ if (!clx_enabled)
+ return 0;
+
/*
* CLx is not enabled and validated on Intel USB4 platforms before
* Alder Lake.
*/
int tb_switch_disable_clx(struct tb_switch *sw, enum tb_clx clx)
{
+ if (!clx_enabled)
+ return 0;
+
switch (clx) {
case TB_CL0S:
return tb_switch_disable_cl0s(sw);