arm64: dts: qcom: sm8250: Add venus DT node

Add DT entries for the sm8250 venus encoder/decoder.

Co-developed-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Co-developed-by: Dikshita Agarwal <dikshita@qti.qualcomm.com>
Signed-off-by: Dikshita Agarwal <dikshita@qti.qualcomm.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210401174256.1810044-3-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 3a58b53..edbcdb9 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2283,6 +2283,65 @@
                        };
                };
 
+               venus: video-codec@aa00000 {
+                       compatible = "qcom,sm8250-venus";
+                       reg = <0 0x0aa00000 0 0x100000>;
+                       interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&videocc MVS0C_GDSC>,
+                                       <&videocc MVS0_GDSC>,
+                                       <&rpmhpd SM8250_MX>;
+                       power-domain-names = "venus", "vcodec0", "mx";
+                       operating-points-v2 = <&venus_opp_table>;
+
+                       clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
+                                <&videocc VIDEO_CC_MVS0C_CLK>,
+                                <&videocc VIDEO_CC_MVS0_CLK>;
+                       clock-names = "iface", "core", "vcodec0_core";
+
+                       interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>,
+                                       <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>;
+                       interconnect-names = "cpu-cfg", "video-mem";
+
+                       iommus = <&apps_smmu 0x2100 0x0400>;
+                       memory-region = <&video_mem>;
+
+                       resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
+                                <&videocc VIDEO_CC_MVS0C_CLK_ARES>;
+                       reset-names = "bus", "core";
+
+                       video-decoder {
+                               compatible = "venus-decoder";
+                       };
+
+                       video-encoder {
+                               compatible = "venus-encoder";
+                       };
+
+                       venus_opp_table: venus-opp-table {
+                               compatible = "operating-points-v2";
+
+                               opp-720000000 {
+                                       opp-hz = /bits/ 64 <720000000>;
+                                       required-opps = <&rpmhpd_opp_low_svs>;
+                               };
+
+                               opp-1014000000 {
+                                       opp-hz = /bits/ 64 <1014000000>;
+                                       required-opps = <&rpmhpd_opp_svs>;
+                               };
+
+                               opp-1098000000 {
+                                       opp-hz = /bits/ 64 <1098000000>;
+                                       required-opps = <&rpmhpd_opp_svs_l1>;
+                               };
+
+                               opp-1332000000 {
+                                       opp-hz = /bits/ 64 <1332000000>;
+                                       required-opps = <&rpmhpd_opp_nom>;
+                               };
+                       };
+               };
+
                videocc: clock-controller@abf0000 {
                        compatible = "qcom,sm8250-videocc";
                        reg = <0 0x0abf0000 0 0x10000>;