case ISD::SMIN:
case ISD::SMAX: Res = PromoteIntRes_SExtIntBinOp(N); break;
case ISD::UMIN:
- case ISD::UMAX: Res = PromoteIntRes_ZExtIntBinOp(N); break;
+ case ISD::UMAX: Res = PromoteIntRes_UMINUMAX(N); break;
case ISD::SHL: Res = PromoteIntRes_SHL(N); break;
case ISD::SIGN_EXTEND_INREG:
LHS.getValueType(), LHS, RHS);
}
+SDValue DAGTypeLegalizer::PromoteIntRes_UMINUMAX(SDNode *N) {
+ // It doesn't matter if we sign extend or zero extend in the inputs. So do
+ // whatever is best for the target.
+ SDValue LHS = SExtOrZExtPromotedInteger(N->getOperand(0));
+ SDValue RHS = SExtOrZExtPromotedInteger(N->getOperand(1));
+ return DAG.getNode(N->getOpcode(), SDLoc(N),
+ LHS.getValueType(), LHS, RHS);
+}
+
SDValue DAGTypeLegalizer::PromoteIntRes_SRA(SDNode *N) {
// The input value must be properly sign extended.
SDValue LHS = SExtPromotedInteger(N->getOperand(0));
SDValue PromoteIntRes_SimpleIntBinOp(SDNode *N);
SDValue PromoteIntRes_ZExtIntBinOp(SDNode *N);
SDValue PromoteIntRes_SExtIntBinOp(SDNode *N);
+ SDValue PromoteIntRes_UMINUMAX(SDNode *N);
SDValue PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N);
SDValue PromoteIntRes_SRA(SDNode *N);
SDValue PromoteIntRes_SRL(SDNode *N);
;
; RV64IB-LABEL: minu_i32:
; RV64IB: # %bb.0:
-; RV64IB-NEXT: zext.w a1, a1
-; RV64IB-NEXT: zext.w a0, a0
; RV64IB-NEXT: minu a0, a0, a1
-; RV64IB-NEXT: sext.w a0, a0
; RV64IB-NEXT: ret
;
; RV64IBB-LABEL: minu_i32:
; RV64IBB: # %bb.0:
-; RV64IBB-NEXT: zext.w a1, a1
-; RV64IBB-NEXT: zext.w a0, a0
; RV64IBB-NEXT: minu a0, a0, a1
-; RV64IBB-NEXT: sext.w a0, a0
; RV64IBB-NEXT: ret
%cmp = icmp ult i32 %a, %b
%cond = select i1 %cmp, i32 %a, i32 %b
;
; RV64IB-LABEL: maxu_i32:
; RV64IB: # %bb.0:
-; RV64IB-NEXT: zext.w a1, a1
-; RV64IB-NEXT: zext.w a0, a0
; RV64IB-NEXT: maxu a0, a0, a1
-; RV64IB-NEXT: sext.w a0, a0
; RV64IB-NEXT: ret
;
; RV64IBB-LABEL: maxu_i32:
; RV64IBB: # %bb.0:
-; RV64IBB-NEXT: zext.w a1, a1
-; RV64IBB-NEXT: zext.w a0, a0
; RV64IBB-NEXT: maxu a0, a0, a1
-; RV64IBB-NEXT: sext.w a0, a0
; RV64IBB-NEXT: ret
%cmp = icmp ugt i32 %a, %b
%cond = select i1 %cmp, i32 %a, i32 %b