DECON should wait for previous update before starting new one. Otherwise
internal registers can be updated in non-atomic, error prone way.
This patch fixes occasional occurrences of vblank timeouts on tm2 platform:
[ 3167.968742] [CRTC:55:crtc-0] vblank wait timed out
[ 3167.987440] WARNING: CPU: 1 PID: 194 at ../drivers/gpu/drm/drm_atomic_helper.c:1423 drm_atomic_helper_wait_for_vblanks.part.9+0x2c0/0x2c8
[ 3168.029990] Modules linked in:
[ 3168.047240] CPU: 1 PID: 194 Comm: modetest Tainted: G W 5.0.0-rc1+ #694
[ 3168.069539] Hardware name: Samsung TM2 board (DT)
...
[ 3168.453566] Call trace:
[ 3168.469705] drm_atomic_helper_wait_for_vblanks.part.9+0x2c0/0x2c8
[ 3168.489983] drm_atomic_helper_commit_tail_rpm+0x60/0x78
[ 3168.509463] commit_tail+0x44/0x78
[ 3168.527053] drm_atomic_helper_commit+0xe8/0x160
[ 3168.546010] drm_atomic_commit+0x48/0x58
[ 3168.564304] drm_atomic_helper_update_plane+0x11c/0x140
[ 3168.584080] __setplane_atomic+0x130/0x150
[ 3168.602799] setplane_internal+0xb0/0x1a8
[ 3168.621493] drm_mode_setplane+0xc4/0x1b8
[ 3168.640219] drm_ioctl_kernel+0x94/0x110
[ 3168.658920] drm_ioctl+0x1c8/0x428
...
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
static void decon_atomic_begin(struct exynos_drm_crtc *crtc)
{
struct decon_context *ctx = to_decon(crtc);
+ u32 val;
+
+ /* wait for finish previous updates */
+ if (readl_poll_timeout(ctx->addr + DECON_UPDATE, val, !val, 1000, 20000) < 0)
+ dev_err(ctx->dev, "DECON_UPDATE timeout\n");
decon_shadow_protect(ctx, true);
decon_set_gscl_mode(ctx);