[POWERPC] 4xx: PIKA Warp base platform
authorSean MacLennan <smaclennan@pikatech.com>
Mon, 21 Jan 2008 17:55:29 +0000 (04:55 +1100)
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>
Fri, 25 Jan 2008 13:09:42 +0000 (07:09 -0600)
Add the base platform support for the PIKA Warp boards.

Signed-off-by: Sean MacLennan <smaclennan@pikatech.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
arch/powerpc/Kconfig
arch/powerpc/platforms/44x/Kconfig
arch/powerpc/platforms/44x/Makefile
arch/powerpc/platforms/44x/warp-nand.c [new file with mode: 0644]
arch/powerpc/platforms/44x/warp.c [new file with mode: 0644]

index 9ae800d..5e10838 100644 (file)
@@ -480,7 +480,7 @@ config MCA
 config PCI
        bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx \
                || PPC_MPC52xx || (EMBEDDED && (PPC_PSERIES || PPC_ISERIES)) \
-               || PPC_PS3
+               || PPC_PS3 || 44x
        default y if !40x && !CPM2 && !8xx && !PPC_83xx \
                && !PPC_85xx && !PPC_86xx
        default PCI_PERMEDIA if !4xx && !CPM2 && !8xx
index c3e4e8c..c062c4c 100644 (file)
@@ -54,6 +54,19 @@ config RAINIER
        help
          This option enables support for the AMCC PPC440GRX evaluation board.
 
+config WARP
+       bool "PIKA Warp"
+       depends on 44x
+       default n
+       select 440EP
+       help
+         This option enables support for the PIKA Warp(tm) Appliance. The Warp
+          is a small computer replacement with up to 9 ports of FXO/FXS plus VOIP
+         stations and trunks.
+
+         See http://www.pikatechnologies.com/ and follow the "PIKA for Computer
+         Telephony Developers" link for more information.
+
 #config LUAN
 #      bool "Luan"
 #      depends on 44x
@@ -76,6 +89,7 @@ config 440EP
        select PPC_FPU
        select IBM440EP_ERR42
        select IBM_NEW_EMAC_ZMII
+       select USB_ARCH_HAS_OHCI
 
 config 440EPX
        bool
index a2a0dc1..0864d4f 100644 (file)
@@ -5,3 +5,5 @@ obj-$(CONFIG_BAMBOO)    += bamboo.o
 obj-$(CONFIG_SEQUOIA)  += sequoia.o
 obj-$(CONFIG_KATMAI)   += katmai.o
 obj-$(CONFIG_RAINIER)  += rainier.o
+obj-$(CONFIG_WARP)     += warp.o
+obj-$(CONFIG_WARP)     += warp-nand.o
diff --git a/arch/powerpc/platforms/44x/warp-nand.c b/arch/powerpc/platforms/44x/warp-nand.c
new file mode 100644 (file)
index 0000000..84ab78f
--- /dev/null
@@ -0,0 +1,105 @@
+/*
+ * PIKA Warp(tm) NAND flash specific routines
+ *
+ * Copyright (c) 2008 PIKA Technologies
+ *   Sean MacLennan <smaclennan@pikatech.com>
+ */
+
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/ndfc.h>
+
+#ifdef CONFIG_MTD_NAND_NDFC
+
+#define CS_NAND_0      1       /* use chip select 1 for NAND device 0 */
+
+#define WARP_NAND_FLASH_REG_ADDR       0xD0000000UL
+#define WARP_NAND_FLASH_REG_SIZE       0x2000
+
+static struct resource warp_ndfc = {
+       .start = WARP_NAND_FLASH_REG_ADDR,
+       .end   = WARP_NAND_FLASH_REG_ADDR + WARP_NAND_FLASH_REG_SIZE,
+       .flags = IORESOURCE_MEM,
+};
+
+static struct mtd_partition nand_parts[] = {
+       {
+               .name   = "kernel",
+               .offset = 0,
+               .size   = 0x0200000
+       },
+       {
+               .name   = "root",
+               .offset = 0x0200000,
+               .size   = 0x3400000
+       },
+       {
+               .name   = "user",
+               .offset = 0x3600000,
+               .size   = 0x0A00000
+       },
+};
+
+struct ndfc_controller_settings warp_ndfc_settings = {
+       .ccr_settings = (NDFC_CCR_BS(CS_NAND_0) | NDFC_CCR_ARAC1),
+       .ndfc_erpn = 0,
+};
+
+static struct ndfc_chip_settings warp_chip0_settings = {
+       .bank_settings = 0x80002222,
+};
+
+struct platform_nand_ctrl warp_nand_ctrl = {
+       .priv = &warp_ndfc_settings,
+};
+
+static struct platform_device warp_ndfc_device = {
+       .name = "ndfc-nand",
+       .id = 0,
+       .dev = {
+               .platform_data = &warp_nand_ctrl,
+       },
+       .num_resources = 1,
+       .resource = &warp_ndfc,
+};
+
+static struct nand_ecclayout nand_oob_16 = {
+       .eccbytes = 3,
+       .eccpos = { 0, 1, 2, 3, 6, 7 },
+       .oobfree = { {.offset = 8, .length = 16} }
+};
+
+static struct platform_nand_chip warp_nand_chip0 = {
+       .nr_chips = 1,
+       .chip_offset = CS_NAND_0,
+       .nr_partitions = ARRAY_SIZE(nand_parts),
+       .partitions = nand_parts,
+       .chip_delay = 50,
+       .ecclayout = &nand_oob_16,
+       .priv = &warp_chip0_settings,
+};
+
+static struct platform_device warp_nand_device = {
+       .name = "ndfc-chip",
+       .id = 0,
+       .num_resources = 1,
+       .resource = &warp_ndfc,
+       .dev = {
+               .platform_data = &warp_nand_chip0,
+               .parent = &warp_ndfc_device.dev,
+       }
+};
+
+static int warp_setup_nand_flash(void)
+{
+       platform_device_register(&warp_ndfc_device);
+       platform_device_register(&warp_nand_device);
+
+       return 0;
+}
+device_initcall(warp_setup_nand_flash);
+
+#endif
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c
new file mode 100644 (file)
index 0000000..8f01563
--- /dev/null
@@ -0,0 +1,153 @@
+/*
+ * PIKA Warp(tm) board specific routines
+ *
+ * Copyright (c) 2008 PIKA Technologies
+ *   Sean MacLennan <smaclennan@pikatech.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/init.h>
+#include <linux/of_platform.h>
+#include <linux/kthread.h>
+
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+
+#include "44x.h"
+
+
+static __initdata struct of_device_id warp_of_bus[] = {
+       { .compatible = "ibm,plb4", },
+       { .compatible = "ibm,opb", },
+       { .compatible = "ibm,ebc", },
+       {},
+};
+
+static int __init warp_device_probe(void)
+{
+       of_platform_bus_probe(NULL, warp_of_bus, NULL);
+       return 0;
+}
+machine_device_initcall(warp, warp_device_probe);
+
+static int __init warp_probe(void)
+{
+       unsigned long root = of_get_flat_dt_root();
+
+       return of_flat_dt_is_compatible(root, "pika,warp");
+}
+
+define_machine(warp) {
+       .name           = "Warp",
+       .probe          = warp_probe,
+       .progress       = udbg_progress,
+       .init_IRQ       = uic_init_tree,
+       .get_irq        = uic_get_irq,
+       .restart        = ppc44x_reset_system,
+       .calibrate_decr = generic_calibrate_decr,
+};
+
+
+#define LED_GREEN (0x80000000 >> 0)
+#define LED_RED   (0x80000000 >> 1)
+
+
+/* This is for the power LEDs 1 = on, 0 = off, -1 = leave alone */
+void warp_set_power_leds(int green, int red)
+{
+       static void __iomem *gpio_base = NULL;
+       unsigned leds;
+
+       if (gpio_base == NULL) {
+               struct device_node *np;
+
+               /* Power LEDS are on the second GPIO controller */
+               np = of_find_compatible_node(NULL, NULL, "ibm,gpio-440EP");
+               if (np)
+                       np = of_find_compatible_node(np, NULL, "ibm,gpio-440EP");
+               if (np == NULL) {
+                       printk(KERN_ERR __FILE__ ": Unable to find gpio\n");
+                       return;
+               }
+
+               gpio_base = of_iomap(np, 0);
+               of_node_put(np);
+               if (gpio_base == NULL) {
+                       printk(KERN_ERR __FILE__ ": Unable to map gpio");
+                       return;
+               }
+       }
+
+       leds = in_be32(gpio_base);
+
+       switch (green) {
+       case 0: leds &= ~LED_GREEN; break;
+       case 1: leds |=  LED_GREEN; break;
+       }
+       switch (red) {
+       case 0: leds &= ~LED_RED; break;
+       case 1: leds |=  LED_RED; break;
+       }
+
+       out_be32(gpio_base, leds);
+}
+EXPORT_SYMBOL(warp_set_power_leds);
+
+
+#ifdef CONFIG_SENSORS_AD7414
+static int pika_dtm_thread(void __iomem *fpga)
+{
+       extern int ad7414_get_temp(int index);
+
+       while (!kthread_should_stop()) {
+               int temp = ad7414_get_temp(0);
+
+               out_be32(fpga, temp);
+
+               set_current_state(TASK_INTERRUPTIBLE);
+               schedule_timeout(HZ);
+       }
+
+       return 0;
+}
+
+static int __init pika_dtm_start(void)
+{
+       struct task_struct *dtm_thread;
+       struct device_node *np;
+       struct resource res;
+       void __iomem *fpga;
+
+       np = of_find_compatible_node(NULL, NULL, "pika,fpga");
+       if (np == NULL)
+               return -ENOENT;
+
+       /* We do not call of_iomap here since it would map in the entire
+        * fpga space, which is over 8k.
+        */
+       if (of_address_to_resource(np, 0, &res)) {
+               of_node_put(np);
+               return -ENOENT;
+       }
+       of_node_put(np);
+
+       fpga = ioremap(res.start + 0x20, 4);
+       if (fpga == NULL)
+               return -ENOENT;
+
+       dtm_thread = kthread_run(pika_dtm_thread, fpga + 0x20, "pika-dtm");
+       if (IS_ERR(dtm_thread)) {
+               iounmap(fpga);
+               return PTR_ERR(dtm_thread);
+       }
+
+       return 0;
+}
+device_initcall(pika_dtm_start);
+#endif