ARM: dts: qcom: stop using snps,dw-pcie falback

Qualcomm PCIe devices are not really compatible with the snps,dw-pcie.
Unlike the generic IP core, they have special requirements regarding
enabling clocks, toggling resets, using the PHY, etc.

This is not to mention that platform snps-dw-pcie driver expects to find
two IRQs declared, while Qualcomm platforms use just one.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220506152107.1527552-7-dmitry.baryshkov@linaro.org

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index ada4c82..257fcd4 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -1384,7 +1384,7 @@
                };
 
                pcie: pci@1b500000 {
-                       compatible = "qcom,pcie-apq8064", "snps,dw-pcie";
+                       compatible = "qcom,pcie-apq8064";
                        reg = <0x1b500000 0x1000>,
                              <0x1b502000 0x80>,
                              <0x1b600000 0x100>,

diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index bb307b8..c07c8a7 100644 (file)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -412,7 +412,7 @@
                };
 
                pcie0: pci@40000000 {
-                       compatible = "qcom,pcie-ipq4019", "snps,dw-pcie";
+                       compatible = "qcom,pcie-ipq4019";
                        reg =  <0x40000000 0xf1d
                                0x40000f20 0xa8
                                0x80000 0x2000