Anomaly
05000480 on BF537 rev 0.0, 0.1, 0.2:
Multiple Simultaneous Urgent DMA Requests May Cause DMA System Instability
Suggested Workaround:
Program the DMA Traffic Control Period to a non-zero value. This forces
the DMA block to group accesses together rather than allow arbitration for
each piece of data placed on the internal DMA bus.
Signed-off-by: Steven Miao <realmz6@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
printk(KERN_INFO "Blackfin DMA Controller\n");
+
+#if ANOMALY_05000480
+ bfin_write_DMAC_TC_PER(0x0111);
+#endif
+
for (i = 0; i < MAX_DMA_CHANNELS; i++) {
atomic_set(&dma_ch[i].chan_status, 0);
dma_ch[i].regs = dma_io_base_addr[i];