projects / platform / kernel / linux-exynos.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: 22acd86)
staging: comedi: ni_660x: remove struct NI_660xRegisterData 'name'
authorH Hartley Sweeten <hsweeten@visionengravers.com>
Tue, 22 Mar 2016 18:10:12 +0000 (11:10 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 28 Mar 2016 14:30:36 +0000 (07:30 -0700)
This member of the struct is not used, and just takes up space. Remove it.
Instead, add the enum ni_660x_register indexes to the table to clarify, and
document, the entries.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/comedi/drivers/ni_660x.c patch | blob | history

diff --git a/drivers/staging/comedi/drivers/ni_660x.c b/drivers/staging/comedi/drivers/ni_660x.c
index 10db2ff..10bb839 100644 (file)
--- a/drivers/staging/comedi/drivers/ni_660x.c
+++ b/drivers/staging/comedi/drivers/ni_660x.c
@@ -187,111 +187,110 @@ static inline unsigned NI_660X_GPCT_SUBDEV(unsigned index)
 }
 
 struct NI_660xRegisterData {
-       const char *name;       /*  Register Name */
        int offset;             /*  Offset from base address from GPCT chip */
        enum ni_660x_register_direction direction;
        enum ni_660x_register_width size; /* 1 byte, 2 bytes, or 4 bytes */
 };
 
 static const struct NI_660xRegisterData registerData[NI660X_NUM_REGS] = {
-       {"G0 Interrupt Acknowledge", 0x004, NI_660x_WRITE, DATA_2B},
-       {"G0 Status Register", 0x004, NI_660x_READ, DATA_2B},
-       {"G1 Interrupt Acknowledge", 0x006, NI_660x_WRITE, DATA_2B},
-       {"G1 Status Register", 0x006, NI_660x_READ, DATA_2B},
-       {"G01 Status Register ", 0x008, NI_660x_READ, DATA_2B},
-       {"G0 Command Register", 0x00C, NI_660x_WRITE, DATA_2B},
-       {"STC DIO Parallel Input", 0x00E, NI_660x_READ, DATA_2B},
-       {"G1 Command Register", 0x00E, NI_660x_WRITE, DATA_2B},
-       {"G0 HW Save Register", 0x010, NI_660x_READ, DATA_4B},
-       {"G1 HW Save Register", 0x014, NI_660x_READ, DATA_4B},
-       {"STC DIO Output", 0x014, NI_660x_WRITE, DATA_2B},
-       {"STC DIO Control", 0x016, NI_660x_WRITE, DATA_2B},
-       {"G0 SW Save Register", 0x018, NI_660x_READ, DATA_4B},
-       {"G1 SW Save Register", 0x01C, NI_660x_READ, DATA_4B},
-       {"G0 Mode Register", 0x034, NI_660x_WRITE, DATA_2B},
-       {"G01 Joint Status 1 Register", 0x036, NI_660x_READ, DATA_2B},
-       {"G1 Mode Register", 0x036, NI_660x_WRITE, DATA_2B},
-       {"STC DIO Serial Input", 0x038, NI_660x_READ, DATA_2B},
-       {"G0 Load A Register", 0x038, NI_660x_WRITE, DATA_4B},
-       {"G01 Joint Status 2 Register", 0x03A, NI_660x_READ, DATA_2B},
-       {"G0 Load B Register", 0x03C, NI_660x_WRITE, DATA_4B},
-       {"G1 Load A Register", 0x040, NI_660x_WRITE, DATA_4B},
-       {"G1 Load B Register", 0x044, NI_660x_WRITE, DATA_4B},
-       {"G0 Input Select Register", 0x048, NI_660x_WRITE, DATA_2B},
-       {"G1 Input Select Register", 0x04A, NI_660x_WRITE, DATA_2B},
-       {"G0 Autoincrement Register", 0x088, NI_660x_WRITE, DATA_2B},
-       {"G1 Autoincrement Register", 0x08A, NI_660x_WRITE, DATA_2B},
-       {"G01 Joint Reset Register", 0x090, NI_660x_WRITE, DATA_2B},
-       {"G0 Interrupt Enable", 0x092, NI_660x_WRITE, DATA_2B},
-       {"G1 Interrupt Enable", 0x096, NI_660x_WRITE, DATA_2B},
-       {"G0 Counting Mode Register", 0x0B0, NI_660x_WRITE, DATA_2B},
-       {"G1 Counting Mode Register", 0x0B2, NI_660x_WRITE, DATA_2B},
-       {"G0 Second Gate Register", 0x0B4, NI_660x_WRITE, DATA_2B},
-       {"G1 Second Gate Register", 0x0B6, NI_660x_WRITE, DATA_2B},
-       {"G0 DMA Config Register", 0x0B8, NI_660x_WRITE, DATA_2B},
-       {"G0 DMA Status Register", 0x0B8, NI_660x_READ, DATA_2B},
-       {"G1 DMA Config Register", 0x0BA, NI_660x_WRITE, DATA_2B},
-       {"G1 DMA Status Register", 0x0BA, NI_660x_READ, DATA_2B},
-       {"G2 Interrupt Acknowledge", 0x104, NI_660x_WRITE, DATA_2B},
-       {"G2 Status Register", 0x104, NI_660x_READ, DATA_2B},
-       {"G3 Interrupt Acknowledge", 0x106, NI_660x_WRITE, DATA_2B},
-       {"G3 Status Register", 0x106, NI_660x_READ, DATA_2B},
-       {"G23 Status Register", 0x108, NI_660x_READ, DATA_2B},
-       {"G2 Command Register", 0x10C, NI_660x_WRITE, DATA_2B},
-       {"G3 Command Register", 0x10E, NI_660x_WRITE, DATA_2B},
-       {"G2 HW Save Register", 0x110, NI_660x_READ, DATA_4B},
-       {"G3 HW Save Register", 0x114, NI_660x_READ, DATA_4B},
-       {"G2 SW Save Register", 0x118, NI_660x_READ, DATA_4B},
-       {"G3 SW Save Register", 0x11C, NI_660x_READ, DATA_4B},
-       {"G2 Mode Register", 0x134, NI_660x_WRITE, DATA_2B},
-       {"G23 Joint Status 1 Register", 0x136, NI_660x_READ, DATA_2B},
-       {"G3 Mode Register", 0x136, NI_660x_WRITE, DATA_2B},
-       {"G2 Load A Register", 0x138, NI_660x_WRITE, DATA_4B},
-       {"G23 Joint Status 2 Register", 0x13A, NI_660x_READ, DATA_2B},
-       {"G2 Load B Register", 0x13C, NI_660x_WRITE, DATA_4B},
-       {"G3 Load A Register", 0x140, NI_660x_WRITE, DATA_4B},
-       {"G3 Load B Register", 0x144, NI_660x_WRITE, DATA_4B},
-       {"G2 Input Select Register", 0x148, NI_660x_WRITE, DATA_2B},
-       {"G3 Input Select Register", 0x14A, NI_660x_WRITE, DATA_2B},
-       {"G2 Autoincrement Register", 0x188, NI_660x_WRITE, DATA_2B},
-       {"G3 Autoincrement Register", 0x18A, NI_660x_WRITE, DATA_2B},
-       {"G23 Joint Reset Register", 0x190, NI_660x_WRITE, DATA_2B},
-       {"G2 Interrupt Enable", 0x192, NI_660x_WRITE, DATA_2B},
-       {"G3 Interrupt Enable", 0x196, NI_660x_WRITE, DATA_2B},
-       {"G2 Counting Mode Register", 0x1B0, NI_660x_WRITE, DATA_2B},
-       {"G3 Counting Mode Register", 0x1B2, NI_660x_WRITE, DATA_2B},
-       {"G3 Second Gate Register", 0x1B6, NI_660x_WRITE, DATA_2B},
-       {"G2 Second Gate Register", 0x1B4, NI_660x_WRITE, DATA_2B},
-       {"G2 DMA Config Register", 0x1B8, NI_660x_WRITE, DATA_2B},
-       {"G2 DMA Status Register", 0x1B8, NI_660x_READ, DATA_2B},
-       {"G3 DMA Config Register", 0x1BA, NI_660x_WRITE, DATA_2B},
-       {"G3 DMA Status Register", 0x1BA, NI_660x_READ, DATA_2B},
-       {"32 bit Digital Input", 0x414, NI_660x_READ, DATA_4B},
-       {"32 bit Digital Output", 0x510, NI_660x_WRITE, DATA_4B},
-       {"Clock Config Register", 0x73C, NI_660x_WRITE, DATA_4B},
-       {"Global Interrupt Status Register", 0x754, NI_660x_READ, DATA_4B},
-       {"DMA Configuration Register", 0x76C, NI_660x_WRITE, DATA_4B},
-       {"Global Interrupt Config Register", 0x770, NI_660x_WRITE, DATA_4B},
-       {"IO Config Register 0-1", 0x77C, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 2-3", 0x77E, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 4-5", 0x780, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 6-7", 0x782, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 8-9", 0x784, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 10-11", 0x786, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 12-13", 0x788, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 14-15", 0x78A, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 16-17", 0x78C, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 18-19", 0x78E, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 20-21", 0x790, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 22-23", 0x792, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 24-25", 0x794, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 26-27", 0x796, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 28-29", 0x798, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 30-31", 0x79A, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 32-33", 0x79C, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 34-35", 0x79E, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 36-37", 0x7A0, NI_660x_READ_WRITE, DATA_2B},
-       {"IO Config Register 38-39", 0x7A2, NI_660x_READ_WRITE, DATA_2B}
+       [NI660X_G0_INT_ACK]             = {0x004, NI_660x_WRITE, DATA_2B},
+       [NI660X_G0_STATUS]              = {0x004, NI_660x_READ, DATA_2B},
+       [NI660X_G1_INT_ACK]             = {0x006, NI_660x_WRITE, DATA_2B},
+       [NI660X_G1_STATUS]              = {0x006, NI_660x_READ, DATA_2B},
+       [NI660X_G01_STATUS]             = {0x008, NI_660x_READ, DATA_2B},
+       [NI660X_G0_CMD]                 = {0x00c, NI_660x_WRITE, DATA_2B},
+       [NI660X_STC_DIO_PARALLEL_INPUT] = {0x00e, NI_660x_READ, DATA_2B},
+       [NI660X_G1_CMD]                 = {0x00e, NI_660x_WRITE, DATA_2B},
+       [NI660X_G0_HW_SAVE]             = {0x010, NI_660x_READ, DATA_4B},
+       [NI660X_G1_HW_SAVE]             = {0x014, NI_660x_READ, DATA_4B},
+       [NI660X_STC_DIO_OUTPUT]         = {0x014, NI_660x_WRITE, DATA_2B},
+       [NI660X_STC_DIO_CONTROL]        = {0x016, NI_660x_WRITE, DATA_2B},
+       [NI660X_G0_SW_SAVE]             = {0x018, NI_660x_READ, DATA_4B},
+       [NI660X_G1_SW_SAVE]             = {0x01c, NI_660x_READ, DATA_4B},
+       [NI660X_G0_MODE]                = {0x034, NI_660x_WRITE, DATA_2B},
+       [NI660X_G01_STATUS1]            = {0x036, NI_660x_READ, DATA_2B},
+       [NI660X_G1_MODE]                = {0x036, NI_660x_WRITE, DATA_2B},
+       [NI660X_STC_DIO_SERIAL_INPUT]   = {0x038, NI_660x_READ, DATA_2B},
+       [NI660X_G0_LOADA]               = {0x038, NI_660x_WRITE, DATA_4B},
+       [NI660X_G01_STATUS2]            = {0x03a, NI_660x_READ, DATA_2B},
+       [NI660X_G0_LOADB]               = {0x03c, NI_660x_WRITE, DATA_4B},
+       [NI660X_G1_LOADA]               = {0x040, NI_660x_WRITE, DATA_4B},
+       [NI660X_G1_LOADB]               = {0x044, NI_660x_WRITE, DATA_4B},
+       [NI660X_G0_INPUT_SEL]           = {0x048, NI_660x_WRITE, DATA_2B},
+       [NI660X_G1_INPUT_SEL]           = {0x04a, NI_660x_WRITE, DATA_2B},
+       [NI660X_G0_AUTO_INC]            = {0x088, NI_660x_WRITE, DATA_2B},
+       [NI660X_G1_AUTO_INC]            = {0x08a, NI_660x_WRITE, DATA_2B},
+       [NI660X_G01_RESET]              = {0x090, NI_660x_WRITE, DATA_2B},
+       [NI660X_G0_INT_ENA]             = {0x092, NI_660x_WRITE, DATA_2B},
+       [NI660X_G1_INT_ENA]             = {0x096, NI_660x_WRITE, DATA_2B},
+       [NI660X_G0_CNT_MODE]            = {0x0b0, NI_660x_WRITE, DATA_2B},
+       [NI660X_G1_CNT_MODE]            = {0x0b2, NI_660x_WRITE, DATA_2B},
+       [NI660X_G0_GATE2]               = {0x0b4, NI_660x_WRITE, DATA_2B},
+       [NI660X_G1_GATE2]               = {0x0b6, NI_660x_WRITE, DATA_2B},
+       [NI660X_G0_DMA_CFG]             = {0x0b8, NI_660x_WRITE, DATA_2B},
+       [NI660X_G0_DMA_STATUS]          = {0x0b8, NI_660x_READ, DATA_2B},
+       [NI660X_G1_DMA_CFG]             = {0x0ba, NI_660x_WRITE, DATA_2B},
+       [NI660X_G1_DMA_STATUS]          = {0x0ba, NI_660x_READ, DATA_2B},
+       [NI660X_G2_INT_ACK]             = {0x104, NI_660x_WRITE, DATA_2B},
+       [NI660X_G2_STATUS]              = {0x104, NI_660x_READ, DATA_2B},
+       [NI660X_G3_INT_ACK]             = {0x106, NI_660x_WRITE, DATA_2B},
+       [NI660X_G3_STATUS]              = {0x106, NI_660x_READ, DATA_2B},
+       [NI660X_G23_STATUS]             = {0x108, NI_660x_READ, DATA_2B},
+       [NI660X_G2_CMD]                 = {0x10c, NI_660x_WRITE, DATA_2B},
+       [NI660X_G3_CMD]                 = {0x10e, NI_660x_WRITE, DATA_2B},
+       [NI660X_G2_HW_SAVE]             = {0x110, NI_660x_READ, DATA_4B},
+       [NI660X_G3_HW_SAVE]             = {0x114, NI_660x_READ, DATA_4B},
+       [NI660X_G2_SW_SAVE]             = {0x118, NI_660x_READ, DATA_4B},
+       [NI660X_G3_SW_SAVE]             = {0x11c, NI_660x_READ, DATA_4B},
+       [NI660X_G2_MODE]                = {0x134, NI_660x_WRITE, DATA_2B},
+       [NI660X_G23_STATUS1]            = {0x136, NI_660x_READ, DATA_2B},
+       [NI660X_G3_MODE]                = {0x136, NI_660x_WRITE, DATA_2B},
+       [NI660X_G2_LOADA]               = {0x138, NI_660x_WRITE, DATA_4B},
+       [NI660X_G23_STATUS2]            = {0x13a, NI_660x_READ, DATA_2B},
+       [NI660X_G2_LOADB]               = {0x13c, NI_660x_WRITE, DATA_4B},
+       [NI660X_G3_LOADA]               = {0x140, NI_660x_WRITE, DATA_4B},
+       [NI660X_G3_LOADB]               = {0x144, NI_660x_WRITE, DATA_4B},
+       [NI660X_G2_INPUT_SEL]           = {0x148, NI_660x_WRITE, DATA_2B},
+       [NI660X_G3_INPUT_SEL]           = {0x14a, NI_660x_WRITE, DATA_2B},
+       [NI660X_G2_AUTO_INC]            = {0x188, NI_660x_WRITE, DATA_2B},
+       [NI660X_G3_AUTO_INC]            = {0x18a, NI_660x_WRITE, DATA_2B},
+       [NI660X_G23_RESET]              = {0x190, NI_660x_WRITE, DATA_2B},
+       [NI660X_G2_INT_ENA]             = {0x192, NI_660x_WRITE, DATA_2B},
+       [NI660X_G3_INT_ENA]             = {0x196, NI_660x_WRITE, DATA_2B},
+       [NI660X_G2_CNT_MODE]            = {0x1b0, NI_660x_WRITE, DATA_2B},
+       [NI660X_G3_CNT_MODE]            = {0x1b2, NI_660x_WRITE, DATA_2B},
+       [NI660X_G3_GATE2]               = {0x1b6, NI_660x_WRITE, DATA_2B},
+       [NI660X_G2_GATE2]               = {0x1b4, NI_660x_WRITE, DATA_2B},
+       [NI660X_G2_DMA_CFG]             = {0x1b8, NI_660x_WRITE, DATA_2B},
+       [NI660X_G2_DMA_STATUS]          = {0x1b8, NI_660x_READ, DATA_2B},
+       [NI660X_G3_DMA_CFG]             = {0x1ba, NI_660x_WRITE, DATA_2B},
+       [NI660X_G3_DMA_STATUS]          = {0x1ba, NI_660x_READ, DATA_2B},
+       [NI660X_DIO32_INPUT]            = {0x414, NI_660x_READ, DATA_4B},
+       [NI660X_DIO32_OUTPUT]           = {0x510, NI_660x_WRITE, DATA_4B},
+       [NI660X_CLK_CFG]                = {0x73c, NI_660x_WRITE, DATA_4B},
+       [NI660X_GLOBAL_INT_STATUS]      = {0x754, NI_660x_READ, DATA_4B},
+       [NI660X_DMA_CFG]                = {0x76c, NI_660x_WRITE, DATA_4B},
+       [NI660X_GLOBAL_INT_CFG]         = {0x770, NI_660x_WRITE, DATA_4B},
+       [NI660X_IO_CFG_0_1]             = {0x77c, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_2_3]             = {0x77e, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_4_5]             = {0x780, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_6_7]             = {0x782, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_8_9]             = {0x784, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_10_11]           = {0x786, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_12_13]           = {0x788, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_14_15]           = {0x78a, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_16_17]           = {0x78c, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_18_19]           = {0x78e, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_20_21]           = {0x790, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_22_23]           = {0x792, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_24_25]           = {0x794, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_26_27]           = {0x796, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_28_29]           = {0x798, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_30_31]           = {0x79a, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_32_33]           = {0x79c, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_34_35]           = {0x79e, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_36_37]           = {0x7a0, NI_660x_READ_WRITE, DATA_2B},
+       [NI660X_IO_CFG_38_39]           = {0x7a2, NI_660x_READ_WRITE, DATA_2B}
 };
 
 /* kind of ENABLE for the second counter */
Domain: System / Kernel;