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mmc: meson_gx_mmc: enable DDR_52MHz mode
authorJaehoon Chung <jh80.chung@samsung.com>
Tue, 10 Nov 2020 08:02:55 +0000 (17:02 +0900)
committerJaehoon Chung <jh80.chung@samsung.com>
Wed, 12 Oct 2022 05:47:55 +0000 (14:47 +0900)
Enable DDR_52MHz mode.

Change-Id: I6bdebff8069f901fe7fc7fdd551d02e0ba89c60e
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
drivers/mmc/meson_gx_mmc.c patch | blob | history

diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
index fcf4f03d1e245acfc45009041dbfde481bb9826a..ba67c5d018b7a275c2abde01ff9c16affb994cfa 100644 (file)
--- a/drivers/mmc/meson_gx_mmc.c
+++ b/drivers/mmc/meson_gx_mmc.c
@@ -277,7 +277,8 @@ static int meson_mmc_probe(struct udevice *dev)
        cfg->voltages = MMC_VDD_33_34 | MMC_VDD_32_33 |
                        MMC_VDD_31_32 | MMC_VDD_165_195;
        cfg->host_caps = MMC_MODE_8BIT | MMC_MODE_4BIT |
-                       MMC_MODE_HS_52MHz | MMC_MODE_HS;
+                       MMC_MODE_HS_52MHz | MMC_MODE_HS |
+                       MMC_MODE_DDR_52MHz;
        cfg->f_min = DIV_ROUND_UP(SD_EMMC_CLKSRC_24M, CLK_MAX_DIV);
        cfg->f_max = 100000000; /* 100 MHz */
        cfg->b_max = 511; /* max 512 - 1 blocks */
Domain: System / Kernel;