radv: Disable texel buffers with A2 SNORM/SSCALED/SINT for pre-vega.
authorBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Sat, 12 May 2018 21:56:56 +0000 (23:56 +0200)
committerBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Mon, 14 May 2018 16:58:30 +0000 (18:58 +0200)
The hardware always interprets the alpha as unsigned and fixing it
in the shader is going to add unacceptable overheads.

CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106480
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
src/amd/vulkan/radv_formats.c

index f8438f4..1ac07b4 100644 (file)
@@ -657,6 +657,25 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
                tiled |= VK_FORMAT_FEATURE_STORAGE_IMAGE_ATOMIC_BIT;
        }
 
+       switch(format) {
+       case VK_FORMAT_A2R10G10B10_SNORM_PACK32:
+       case VK_FORMAT_A2B10G10R10_SNORM_PACK32:
+       case VK_FORMAT_A2R10G10B10_SSCALED_PACK32:
+       case VK_FORMAT_A2B10G10R10_SSCALED_PACK32:
+       case VK_FORMAT_A2R10G10B10_SINT_PACK32:
+       case VK_FORMAT_A2B10G10R10_SINT_PACK32:
+               if (physical_device->rad_info.chip_class <= VI &&
+                   physical_device->rad_info.family != CHIP_STONEY) {
+                       buffer &= ~(VK_FORMAT_FEATURE_UNIFORM_TEXEL_BUFFER_BIT |
+                                   VK_FORMAT_FEATURE_STORAGE_TEXEL_BUFFER_BIT);
+                       linear = 0;
+                       tiled = 0;
+               }
+               break;
+       default:
+               break;
+       }
+
        out_properties->linearTilingFeatures = linear;
        out_properties->optimalTilingFeatures = tiled;
        out_properties->bufferFeatures = buffer;