+2013-09-23 Christian Bruel <christian.bruel@st.com>
+
+ PR target/58475
+ * config/sh/sh.md (movsf_ie): Allow fpul_operand.
+ * config/sh/predicate.md (arith_reg_operand): Disallow FPUL_REG.
+
2013-09-23 James Greenhalgh <james.greenhalgh@arm.com>
Revert r202780:
(aarch64_expand_epilogue): Likewise.
(aarch64_legitimize_reload_address): Likewise.
+>>>>>>> .r202824
2013-09-22 Eric Botcazou <ebotcazou@adacore.com>
* gimplify.c (gimplify_asm_expr): Reset the TREE_CHAIN of clobbers to
(use (match_operand:PSI 2 "fpscr_operand" "c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c"))
(clobber (match_scratch:SI 3 "=X,X,Bsc,Bsc,&z,X,X,X,X,X,X,X,X,y,X,X,X,X,X"))]
"TARGET_SH2E
- && (arith_reg_operand (operands[0], SFmode)
- || arith_reg_operand (operands[1], SFmode)
- || arith_reg_operand (operands[3], SImode)
- || (fpul_operand (operands[0], SFmode)
- && memory_operand (operands[1], SFmode)
- && GET_CODE (XEXP (operands[1], 0)) == POST_INC)
- || (fpul_operand (operands[1], SFmode)
- && memory_operand (operands[0], SFmode)
- && GET_CODE (XEXP (operands[0], 0)) == PRE_DEC))"
+ && (arith_reg_operand (operands[0], SFmode) || fpul_operand (operands[0], SFmode)
+ || arith_reg_operand (operands[1], SFmode) || fpul_operand (operands[1], SFmode)
+ || arith_reg_operand (operands[3], SImode))"
"@
fmov %1,%0
mov %1,%0
--- /dev/null
+/* { dg-do compile { target "sh*-*-*" } } */
+
+int
+kerninfo(int __bsx, double tscale)
+{
+ return (
+ (int)(__extension__
+ ({
+ ((((__bsx) & 0xff000000u) >> 24)
+ | (((__bsx) & 0x00ff0000) >> 8)
+ | (((__bsx) & 0x0000ff00) << 8)
+ | (((__bsx) & 0x000000ff) << 24)
+ ); }))
+ * tscale);
+}