extern bool prefixed_load_p (rtx_insn *);
extern bool prefixed_store_p (rtx_insn *);
extern bool prefixed_paddi_p (rtx_insn *);
-extern bool prefixed_xxsplti_p (rtx_insn *);
extern void rs6000_asm_output_opcode (FILE *);
extern void output_pcrel_opt_reloc (rtx);
extern void rs6000_final_prescan_insn (rtx_insn *, rtx [], int);
return (iform == INSN_FORM_PCREL_EXTERNAL || iform == INSN_FORM_PCREL_LOCAL);
}
-/* Whether an instruction is a prefixed XXSPLTI* instruction. This is called
- from the prefixed attribute processing. */
-
-bool
-prefixed_xxsplti_p (rtx_insn *insn)
-{
- rtx set = single_set (insn);
- if (!set)
- return false;
-
- rtx dest = SET_DEST (set);
- rtx src = SET_SRC (set);
- machine_mode mode = GET_MODE (dest);
-
- if (!REG_P (dest) && !SUBREG_P (dest))
- return false;
-
- if (GET_CODE (src) == UNSPEC)
- {
- int unspec = XINT (src, 1);
- return (unspec == UNSPEC_XXSPLTIW
- || unspec == UNSPEC_XXSPLTIDP
- || unspec == UNSPEC_XXSPLTI32DX);
- }
-
- vec_const_128bit_type vsx_const;
- if (vec_const_128bit_to_bytes (src, mode, &vsx_const))
- {
- if (constant_generates_xxspltiw (&vsx_const))
- return true;
-
- if (constant_generates_xxspltidp (&vsx_const))
- return true;
- }
-
- return false;
-}
-
/* Whether the next instruction needs a 'p' prefix issued before the
instruction is printed out. */
static bool prepend_p_to_next_insn;
(eq_attr "type" "integer,add")
(if_then_else (match_test "prefixed_paddi_p (insn)")
(const_string "yes")
- (const_string "no"))
-
- (eq_attr "type" "vecperm")
- (if_then_else (match_test "prefixed_xxsplti_p (insn)")
- (const_string "yes")
(const_string "no"))]
(const_string "no")))
(set_attr "isa"
"*, *, p9v, p8v, *, p9v,
p8v, *, *, *, *, *,
- *, *, *, *, p10")])
+ *, *, *, *, p10")
+ (set_attr "prefixed"
+ "*, *, *, *, *, *,
+ *, *, *, *, *, *,
+ *, *, *, *, yes")])
;; LWZ LFIWZX STW STFIWX MTVSRWZ MFVSRWZ
;; FMR MR MT%0 MF%1 NOP
(set_attr "isa"
"*, *, *, p9v, p9v,
p7v, p7v, *, *, *,
- *, *, *, p10")])
+ *, *, *, p10")
+ (set_attr "prefixed"
+ "*, *, *, *, *,
+ *, *, *, *, *,
+ *, *, *, yes")])
;; STW LWZ MR G-const H-const F-const
"*, *, *, p9v, p9v,
p7v, p7v, *, *, *,
*, *, *, *, *,
- *, p8v, p8v, p10")])
+ *, p8v, p8v, p10")
+ (set_attr "prefixed"
+ "*, *, *, *, *,
+ *, *, *, *, *,
+ *, *, *, *, *,
+ *, *, *, *")])
;; STD LD MR MT<SPR> MF<SPR> G-const
;; H-const F-const Special
"<VSisa>, <VSisa>, <VSisa>, *, *, *,
*, *, *, *, p9v, *,
p10, p10,
- <VSisa>, *, *, *, *")])
+ <VSisa>, *, *, *, *")
+ (set_attr "prefixed"
+ "*, *, *, *, *, *,
+ *, *, *, *, *, *,
+ *, yes,
+ *, *, *, *, *")])
;; VSX store VSX load VSX move GPR load GPR store GPR move
;; LXVKQ XXSPLTI*
"<VSisa>, <VSisa>, <VSisa>, *, *, *,
p10, p10,
p9v, *, <VSisa>, *, *,
+ *, *")
+ (set_attr "prefixed"
+ "*, *, *, *, *, *,
+ *, yes,
+ *, *, *, *, *,
*, *")])
;; Explicit load/store expanders for the builtin functions