#define LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPARCH_H
#include "llvm/ADT/StringSwitch.h"
+#include <optional>
namespace llvm {
namespace Hexagon {
V73
};
-inline Optional<Hexagon::ArchEnum> getCpu(StringRef CPU) {
- return StringSwitch<Optional<Hexagon::ArchEnum>>(CPU)
+inline std::optional<Hexagon::ArchEnum> getCpu(StringRef CPU) {
+ return StringSwitch<std::optional<Hexagon::ArchEnum>>(CPU)
.Case("generic", Hexagon::ArchEnum::V5)
.Case("hexagonv5", Hexagon::ArchEnum::V5)
.Case("hexagonv55", Hexagon::ArchEnum::V55)
#include <cstdint>
#include <cstring>
#include <iterator>
+#include <optional>
#include <string>
#include <utility>
#include <algorithm>
#include <cassert>
#include <map>
+#include <optional>
using namespace llvm;
HexagonSubtarget &
HexagonSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) {
- Optional<Hexagon::ArchEnum> ArchVer = Hexagon::getCpu(CPUString);
+ std::optional<Hexagon::ArchEnum> ArchVer = Hexagon::getCpu(CPUString);
if (ArchVer)
HexagonArchVersion = *ArchVer;
else
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cassert>
+#include <optional>
#include <utility>
#include <vector>
}
bool HexagonShuffler::ValidResourceUsage(HexagonPacketSummary const &Summary) {
- Optional<HexagonPacket> ShuffledPacket = tryAuction(Summary);
+ std::optional<HexagonPacket> ShuffledPacket = tryAuction(Summary);
if (!ShuffledPacket) {
reportResourceError(Summary, "slot error");
return !CheckFailure;
}
-llvm::Optional<HexagonShuffler::HexagonPacket>
+std::optional<HexagonShuffler::HexagonPacket>
HexagonShuffler::tryAuction(HexagonPacketSummary const &Summary) {
HexagonPacket PacketResult = Packet;
HexagonUnitAuction AuctionCore(Summary.ReservedSlotMask);
<< llvm::format_hex(ISJ.Core.getUnits(), 4, true) << "\n";
);
- Optional<HexagonPacket> Res;
+ std::optional<HexagonPacket> Res;
if (ValidSlots)
Res = PacketResult;
#include "llvm/Support/SMLoc.h"
#include <cstdint>
#include <functional>
+#include <optional>
#include <utility>
namespace llvm {
// Number of duplex insns
unsigned duplex;
unsigned pSlot3Cnt;
- Optional<HexagonInstr *> PrefSlot3Inst;
+ std::optional<HexagonInstr *> PrefSlot3Inst;
unsigned memops;
unsigned ReservedSlotMask;
SmallVector<HexagonInstr *, HEXAGON_PRESHUFFLE_PACKET_SIZE> branchInsts;
- Optional<SMLoc> Slot1AOKLoc;
- Optional<SMLoc> NoSlot1StoreLoc;
+ std::optional<SMLoc> Slot1AOKLoc;
+ std::optional<SMLoc> NoSlot1StoreLoc;
};
// Insn handles in a bundle.
HexagonPacket Packet;
const bool DoShuffle);
void permitNonSlot();
- Optional<HexagonPacket> tryAuction(HexagonPacketSummary const &Summary);
+ std::optional<HexagonPacket> tryAuction(HexagonPacketSummary const &Summary);
HexagonPacketSummary GetPacketSummary();
bool ValidPacketMemoryOps(HexagonPacketSummary const &Summary) const;