clk: mediatek: clk-mt8195-topckgen: Add GPU clock mux notifier

Following the changes done to MT8183, register a similar notifier
for MT8195 as well, allowing safe clockrate updates for the MFGPLL.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220927101128.44758-8-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>

diff --git a/drivers/clk/mediatek/clk-mt8195-topckgen.c b/drivers/clk/mediatek/clk-mt8195-topckgen.c
index e1c3ab4..4dde23b 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8195-topckgen.c
+++ b/drivers/clk/mediatek/clk-mt8195-topckgen.c
@@ -1217,6 +1217,21 @@ static const struct of_device_id of_match_clk_mt8195_topck[] = {
        {}
 };
 
+/* Register mux notifier for MFG mux */
+static int clk_mt8195_reg_mfg_mux_notifier(struct device *dev, struct clk *clk)
+{
+       struct mtk_mux_nb *mfg_mux_nb;
+
+       mfg_mux_nb = devm_kzalloc(dev, sizeof(*mfg_mux_nb), GFP_KERNEL);
+       if (!mfg_mux_nb)
+               return -ENOMEM;
+
+       mfg_mux_nb->ops = &clk_mux_ops;
+       mfg_mux_nb->bypass_index = 0; /* Bypass to TOP_MFG_CORE_TMP */
+
+       return devm_mtk_clk_mux_notifier_register(dev, clk, mfg_mux_nb);
+}
+
 static int clk_mt8195_topck_probe(struct platform_device *pdev)
 {
        struct clk_hw_onecell_data *top_clk_data;
@@ -1256,6 +1271,11 @@ static int clk_mt8195_topck_probe(struct platform_device *pdev)
                goto unregister_muxes;
        top_clk_data->hws[CLK_TOP_MFG_CK_FAST_REF] = hw;
 
+       r = clk_mt8195_reg_mfg_mux_notifier(&pdev->dev,
+                                           top_clk_data->hws[CLK_TOP_MFG_CK_FAST_REF]->clk);
+       if (r)
+               goto unregister_muxes;
+
        r = mtk_clk_register_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), base,
                                        &mt8195_clk_lock, top_clk_data);
        if (r)