drm/amdgpu: disable mec2 fw bin loading
authorJohn Clements <john.clements@amd.com>
Tue, 23 Feb 2021 09:03:08 +0000 (17:03 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 Feb 2021 14:28:55 +0000 (09:28 -0500)
disable mec2 fw bin loading and reference on unsupported ASIC

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

index 65db88b..2f56ade 100644 (file)
@@ -107,14 +107,12 @@ MODULE_FIRMWARE("amdgpu/raven2_rlc.bin");
 MODULE_FIRMWARE("amdgpu/raven_kicker_rlc.bin");
 
 MODULE_FIRMWARE("amdgpu/arcturus_mec.bin");
-MODULE_FIRMWARE("amdgpu/arcturus_mec2.bin");
 MODULE_FIRMWARE("amdgpu/arcturus_rlc.bin");
 
 MODULE_FIRMWARE("amdgpu/renoir_ce.bin");
 MODULE_FIRMWARE("amdgpu/renoir_pfp.bin");
 MODULE_FIRMWARE("amdgpu/renoir_me.bin");
 MODULE_FIRMWARE("amdgpu/renoir_mec.bin");
-MODULE_FIRMWARE("amdgpu/renoir_mec2.bin");
 MODULE_FIRMWARE("amdgpu/renoir_rlc.bin");
 
 MODULE_FIRMWARE("amdgpu/green_sardine_ce.bin");
@@ -1517,6 +1515,15 @@ out:
        return err;
 }
 
+static bool gfx_v9_0_load_mec2_fw_bin_support(struct amdgpu_device *adev)
+{
+       if (adev->asic_type == CHIP_ARCTURUS  ||
+           adev->asic_type == CHIP_RENOIR)
+           return false;
+
+       return true;
+}
+
 static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev,
                                          const char *chip_name)
 {
@@ -1538,21 +1545,23 @@ static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev,
        adev->gfx.mec_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 
 
-       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name);
-       err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev);
-       if (!err) {
-               err = amdgpu_ucode_validate(adev->gfx.mec2_fw);
-               if (err)
-                       goto out;
-               cp_hdr = (const struct gfx_firmware_header_v1_0 *)
-               adev->gfx.mec2_fw->data;
-               adev->gfx.mec2_fw_version =
-               le32_to_cpu(cp_hdr->header.ucode_version);
-               adev->gfx.mec2_feature_version =
-               le32_to_cpu(cp_hdr->ucode_feature_version);
-       } else {
-               err = 0;
-               adev->gfx.mec2_fw = NULL;
+       if (gfx_v9_0_load_mec2_fw_bin_support(adev)) {
+               snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name);
+               err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev);
+               if (!err) {
+                       err = amdgpu_ucode_validate(adev->gfx.mec2_fw);
+                       if (err)
+                               goto out;
+                       cp_hdr = (const struct gfx_firmware_header_v1_0 *)
+                       adev->gfx.mec2_fw->data;
+                       adev->gfx.mec2_fw_version =
+                       le32_to_cpu(cp_hdr->header.ucode_version);
+                       adev->gfx.mec2_feature_version =
+                       le32_to_cpu(cp_hdr->ucode_feature_version);
+               } else {
+                       err = 0;
+                       adev->gfx.mec2_fw = NULL;
+               }
        }
 
        if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
@@ -1581,8 +1590,7 @@ static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev,
 
                        /* TODO: Determine if MEC2 JT FW loading can be removed
                                 for all GFX V9 asic and above */
-                       if (adev->asic_type != CHIP_ARCTURUS &&
-                           adev->asic_type != CHIP_RENOIR) {
+                       if (gfx_v9_0_load_mec2_fw_bin_support(adev)) {
                                info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2_JT];
                                info->ucode_id = AMDGPU_UCODE_ID_CP_MEC2_JT;
                                info->fw = adev->gfx.mec2_fw;