drm/amdgpu: Map all visible VRAM at startup
authorAmber Lin <Amber.Lin@amd.com>
Tue, 27 Feb 2018 15:01:59 +0000 (10:01 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 28 Feb 2018 20:38:46 +0000 (15:38 -0500)
When using CPU to update page table, we need to kmap all the PDs/PTs after
they are allocated and that requires a TLB shot down on each CPU, which is
quite heavy.

Instead, we map the whole visible VRAM to a kernel address at once. Pages
can be obtained from the offset.

v2: move the mapping base from gmc to amdgpu_mman structure, and the
    implementation in amdgpu_ttm_* functions

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

index e38e6db..f126a5a 100644 (file)
@@ -621,6 +621,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_
 {
        struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
        struct amdgpu_device *adev = amdgpu_ttm_adev(bdev);
+       struct drm_mm_node *mm_node = mem->mm_node;
 
        mem->bus.addr = NULL;
        mem->bus.offset = 0;
@@ -640,6 +641,15 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_
                /* check if it's visible */
                if ((mem->bus.offset + mem->bus.size) > adev->gmc.visible_vram_size)
                        return -EINVAL;
+               /* Only physically contiguous buffers apply. In a contiguous
+                * buffer, size of the first mm_node would match the number of
+                * pages in ttm_mem_reg.
+                */
+               if (adev->mman.aper_base_kaddr &&
+                   (mm_node->size == mem->num_pages))
+                       mem->bus.addr = (u8 *)adev->mman.aper_base_kaddr +
+                                       mem->bus.offset;
+
                mem->bus.base = adev->gmc.aper_base;
                mem->bus.is_iomem = true;
                break;
@@ -1402,6 +1412,10 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
 
        /* Change the size here instead of the init above so only lpfn is affected */
        amdgpu_ttm_set_active_vram_size(adev, adev->gmc.visible_vram_size);
+#ifdef CONFIG_64BIT
+       adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
+                                               adev->gmc.visible_vram_size);
+#endif
 
        /*
         *The reserved vram for firmware must be pinned to the specified
@@ -1494,6 +1508,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
        amdgpu_ttm_debugfs_fini(adev);
        amdgpu_bo_free_kernel(&adev->stolen_vga_memory, NULL, NULL);
        amdgpu_ttm_fw_reserve_vram_fini(adev);
+       if (adev->mman.aper_base_kaddr)
+               iounmap(adev->mman.aper_base_kaddr);
+       adev->mman.aper_base_kaddr = NULL;
 
        ttm_bo_clean_mm(&adev->mman.bdev, TTM_PL_VRAM);
        ttm_bo_clean_mm(&adev->mman.bdev, TTM_PL_TT);
index 1e275c7..d314910 100644 (file)
@@ -44,6 +44,7 @@ struct amdgpu_mman {
        struct ttm_bo_device            bdev;
        bool                            mem_global_referenced;
        bool                            initialized;
+       void __iomem                    *aper_base_kaddr;
 
 #if defined(CONFIG_DEBUG_FS)
        struct dentry                   *debugfs_entries[8];