[mono] Add Vector128 ConditionalSelect intrinsics for Amd64 (#75838)

* Conditional Select for amd64, refactor arm64 code

* Add missing newline in mini-ops.h file

diff --git a/src/mono/mono/mini/mini-llvm.c b/src/mono/mono/mini/mini-llvm.c
index 991c5a4..5fda504 100644 (file)
--- a/src/mono/mono/mini/mini-llvm.c
+++ b/src/mono/mono/mini/mini-llvm.c
@@ -9976,18 +9976,6 @@ MONO_RESTORE_WARNING
                        values [ins->dreg] = result;
                        break;
                }
-               case OP_ARM64_BSL: {
-                       LLVMTypeRef ret_t = LLVMTypeOf (rhs);
-                       LLVMValueRef select = bitcast_to_integral (ctx, lhs);
-                       LLVMValueRef left = bitcast_to_integral (ctx, rhs);
-                       LLVMValueRef right = bitcast_to_integral (ctx, arg3);
-                       LLVMValueRef result1 = LLVMBuildAnd (builder, select, left, "arm64_bsl");
-                       LLVMValueRef result2 = LLVMBuildAnd (builder, LLVMBuildNot (builder, select, ""), right, "");
-                       LLVMValueRef result = LLVMBuildOr (builder, result1, result2, "");
-                       result = convert (ctx, result, ret_t);
-                       values [ins->dreg] = result;
-                       break;
-               }
                case OP_ARM64_CMTST: {
                        LLVMTypeRef ret_t = simd_class_to_llvm_type (ctx, ins->klass);
                        LLVMValueRef l = bitcast_to_integral (ctx, lhs);
@@ -11301,6 +11289,21 @@ MONO_RESTORE_WARNING
                        break;
                }
 #endif
+#if defined(TARGET_ARM64) || defined(TARGET_AMD64)
+               case OP_BSL: {
+                       LLVMTypeRef ret_t = LLVMTypeOf (rhs);
+                       LLVMValueRef select = bitcast_to_integral (ctx, lhs);
+                       LLVMValueRef left = bitcast_to_integral (ctx, rhs);
+                       LLVMValueRef right = bitcast_to_integral (ctx, arg3);
+                       LLVMValueRef result1 = LLVMBuildAnd (builder, select, left, "bit_select");
+                       LLVMValueRef result2 = LLVMBuildAnd (builder, LLVMBuildNot (builder, select, ""), right, "");
+                       LLVMValueRef result = LLVMBuildOr (builder, result1, result2, "");
+                       result = convert (ctx, result, ret_t);
+                       values [ins->dreg] = result;
+                       break;
+               }
+
+#endif
 
                case OP_DUMMY_USE:
                        break;

diff --git a/src/mono/mono/mini/mini-ops.h b/src/mono/mono/mini/mini-ops.h
index 7e17f88..7a2cb69 100644 (file)
--- a/src/mono/mono/mini/mini-ops.h
+++ b/src/mono/mono/mini/mini-ops.h
@@ -1719,7 +1719,6 @@ MINI_OP(OP_ARM64_FCVTL2, "arm64_fcvtl2", XREG, XREG, NONE)
 
 MINI_OP(OP_ARM64_CMTST, "arm64_cmtst", XREG, XREG, XREG)
 
-MINI_OP3(OP_ARM64_BSL, "arm64_bsl", XREG, XREG, XREG, XREG)
 MINI_OP(OP_ARM64_BIC, "arm64_bic", XREG, XREG, XREG)
 
 MINI_OP(OP_ARM64_MVN, "arm64_mvn", XREG, XREG, NONE)
@@ -1777,3 +1776,7 @@ MINI_OP3(OP_ARM64_SQRDMLSH_SCALAR, "arm64_sqrdmlsh_scalar", XREG, XREG, XREG, XR
 #if defined(TARGET_WASM)
 MINI_OP(OP_WASM_ONESCOMPLEMENT, "wasm_onescomplement", XREG, XREG, NONE)
 #endif
+
+#if defined(TARGET_ARM64) || defined(TARGET_AMD64)
+MINI_OP3(OP_BSL, "bitwise_select", XREG, XREG, XREG, XREG)
+#endif // TARGET_ARM64 || TARGET_AMD64

diff --git a/src/mono/mono/mini/simd-intrinsics.c b/src/mono/mono/mini/simd-intrinsics.c
index d5fcdaf..329d7d8 100644 (file)
--- a/src/mono/mono/mini/simd-intrinsics.c
+++ b/src/mono/mono/mini/simd-intrinsics.c
@@ -1183,10 +1183,10 @@ emit_sri_vector (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsi
 #endif
        }
        case SN_ConditionalSelect: {
-#ifdef TARGET_ARM64
+#if defined(TARGET_ARM64) || defined(TARGET_AMD64)
                if (!is_element_type_primitive (fsig->params [0]))
                        return NULL;
-               return emit_simd_ins_for_sig (cfg, klass, OP_ARM64_BSL, -1, arg0_type, fsig, args);
+               return emit_simd_ins_for_sig (cfg, klass, OP_BSL, -1, arg0_type, fsig, args);
 #else
                return NULL;
 #endif
@@ -2415,7 +2415,7 @@ static SimdIntrinsic advsimd_methods [] = {
        {SN_AddWideningUpper, OP_ARM64_SADD2, None, OP_ARM64_UADD2},
        {SN_And, OP_XBINOP_FORCEINT, XBINOP_FORCEINT_AND},
        {SN_BitwiseClear, OP_ARM64_BIC},
-       {SN_BitwiseSelect, OP_ARM64_BSL},
+       {SN_BitwiseSelect, OP_BSL},
        {SN_Ceiling, OP_XOP_OVR_X_X, INTRINS_AARCH64_ADV_SIMD_FRINTP},
        {SN_CeilingScalar, OP_XOP_OVR_SCALAR_X_X, INTRINS_AARCH64_ADV_SIMD_FRINTP},
        {SN_CompareEqual, OP_XCOMPARE, CMP_EQ, OP_XCOMPARE, CMP_EQ, OP_XCOMPARE_FP, CMP_EQ},