drm/i915: Move GGTT fence registers under gt/
authorChris Wilson <chris@chris-wilson.co.uk>
Mon, 16 Mar 2020 11:38:43 +0000 (11:38 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Mon, 16 Mar 2020 20:28:26 +0000 (20:28 +0000)
Since the fence registers control HW detiling through the GGTT
aperture, make them a part of the intel_ggtt under gt/

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200316113846.4974-1-chris@chris-wilson.co.uk
12 files changed:
drivers/gpu/drm/i915/Makefile
drivers/gpu/drm/i915/gt/intel_ggtt.c
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c [moved from drivers/gpu/drm/i915/i915_gem_fence_reg.c with 97% similarity]
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h [moved from drivers/gpu/drm/i915/i915_gem_fence_reg.h with 92% similarity]
drivers/gpu/drm/i915/gt/intel_gtt.h
drivers/gpu/drm/i915/gt/intel_reset.c
drivers/gpu/drm/i915/gvt/aperture_gm.c
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_vma.h
drivers/gpu/drm/i915/selftests/i915_gem.c

index 9f887a8..1b2ed96 100644 (file)
@@ -92,6 +92,7 @@ gt-y += \
        gt/intel_engine_pool.o \
        gt/intel_engine_user.o \
        gt/intel_ggtt.o \
+       gt/intel_ggtt_fencing.o \
        gt/intel_gt.o \
        gt/intel_gt_irq.o \
        gt/intel_gt_pm.o \
@@ -153,7 +154,6 @@ i915-y += \
          i915_buddy.o \
          i915_cmd_parser.o \
          i915_gem_evict.o \
-         i915_gem_fence_reg.o \
          i915_gem_gtt.o \
          i915_gem.o \
          i915_globals.o \
index aed498a..a7b72fa 100644 (file)
@@ -65,7 +65,7 @@ static int ggtt_init_hw(struct i915_ggtt *ggtt)
                                              ggtt->mappable_end);
        }
 
-       i915_ggtt_init_fences(ggtt);
+       intel_ggtt_init_fences(ggtt);
 
        return 0;
 }
similarity index 97%
rename from drivers/gpu/drm/i915/i915_gem_fence_reg.c
rename to drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index d152b64..94af756 100644 (file)
@@ -233,16 +233,9 @@ static int fence_update(struct i915_fence_reg *fence,
        int ret;
 
        if (vma) {
-               if (!i915_vma_is_map_and_fenceable(vma))
-                       return -EINVAL;
-
-               if (drm_WARN(&uncore->i915->drm,
-                            !i915_gem_object_get_stride(vma->obj) ||
-                            !i915_gem_object_get_tiling(vma->obj),
-                            "bogus fence setup with stride: 0x%x, tiling mode: %i\n",
-                            i915_gem_object_get_stride(vma->obj),
-                            i915_gem_object_get_tiling(vma->obj)))
-                       return -EINVAL;
+               GEM_BUG_ON(!i915_vma_is_map_and_fenceable(vma));
+               GEM_BUG_ON(!i915_gem_object_get_stride(vma->obj) ||
+                          !i915_gem_object_get_tiling(vma->obj));
 
                ret = i915_vma_sync(vma);
                if (ret)
@@ -276,7 +269,7 @@ static int fence_update(struct i915_fence_reg *fence,
        /*
         * We only need to update the register itself if the device is awake.
         * If the device is currently powered down, we will defer the write
-        * to the runtime resume, see i915_gem_restore_fences().
+        * to the runtime resume, see intel_ggtt_restore_fences().
         *
         * This only works for removing the fence register, on acquisition
         * the caller must hold the rpm wakeref. The fence register must
@@ -487,14 +480,14 @@ void i915_unreserve_fence(struct i915_fence_reg *fence)
 }
 
 /**
- * i915_gem_restore_fences - restore fence state
+ * intel_ggtt_restore_fences - restore fence state
  * @ggtt: Global GTT
  *
  * Restore the hw fence state to match the software tracking again, to be called
  * after a gpu reset and on resume. Note that on runtime suspend we only cancel
  * the fences, to be reacquired by the user later.
  */
-void i915_gem_restore_fences(struct i915_ggtt *ggtt)
+void intel_ggtt_restore_fences(struct i915_ggtt *ggtt)
 {
        int i;
 
@@ -746,7 +739,7 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt)
  * bit 17 of its physical address and therefore being interpreted differently
  * by the GPU.
  */
-static void i915_gem_swizzle_page(struct page *page)
+static void swizzle_page(struct page *page)
 {
        char temp[64];
        char *vaddr;
@@ -791,7 +784,7 @@ i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj,
        for_each_sgt_page(page, sgt_iter, pages) {
                char new_bit_17 = page_to_phys(page) >> 17;
                if ((new_bit_17 & 0x1) != (test_bit(i, obj->bit_17) != 0)) {
-                       i915_gem_swizzle_page(page);
+                       swizzle_page(page);
                        set_page_dirty(page);
                }
                i++;
@@ -836,7 +829,7 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
        }
 }
 
-void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
+void intel_ggtt_init_fences(struct i915_ggtt *ggtt)
 {
        struct drm_i915_private *i915 = ggtt->vm.i915;
        struct intel_uncore *uncore = ggtt->vm.gt->uncore;
@@ -875,7 +868,7 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
        }
        ggtt->num_fences = num_fences;
 
-       i915_gem_restore_fences(ggtt);
+       intel_ggtt_restore_fences(ggtt);
 }
 
 void intel_gt_init_swizzling(struct intel_gt *gt)
similarity index 92%
rename from drivers/gpu/drm/i915/i915_gem_fence_reg.h
rename to drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h
index 7bd521c..3b3eb5b 100644 (file)
@@ -22,8 +22,8 @@
  *
  */
 
-#ifndef __I915_FENCE_REG_H__
-#define __I915_FENCE_REG_H__
+#ifndef __INTEL_GGTT_FENCING_H__
+#define __INTEL_GGTT_FENCING_H__
 
 #include <linux/list.h>
 #include <linux/types.h>
@@ -53,18 +53,17 @@ struct i915_fence_reg {
        bool dirty;
 };
 
-/* i915_gem_fence_reg.c */
 struct i915_fence_reg *i915_reserve_fence(struct i915_ggtt *ggtt);
 void i915_unreserve_fence(struct i915_fence_reg *fence);
 
-void i915_gem_restore_fences(struct i915_ggtt *ggtt);
+void intel_ggtt_restore_fences(struct i915_ggtt *ggtt);
 
 void i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj,
                                       struct sg_table *pages);
 void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
                                         struct sg_table *pages);
 
-void i915_ggtt_init_fences(struct i915_ggtt *ggtt);
+void intel_ggtt_init_fences(struct i915_ggtt *ggtt);
 
 void intel_gt_init_swizzling(struct intel_gt *gt);
 
index b3116fe..ce6ff9d 100644 (file)
@@ -26,7 +26,7 @@
 #include <drm/drm_mm.h>
 
 #include "gt/intel_reset.h"
-#include "i915_gem_fence_reg.h"
+#include "gt/intel_ggtt_fencing.h"
 #include "i915_selftest.h"
 #include "i915_vma_types.h"
 
index 8b170c1..9a15bdf 100644 (file)
@@ -750,7 +750,7 @@ static int gt_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask)
        for_each_engine(engine, gt, id)
                __intel_engine_reset(engine, stalled_mask & engine->mask);
 
-       i915_gem_restore_fences(gt->ggtt);
+       intel_ggtt_restore_fences(gt->ggtt);
 
        return err;
 }
index 8b13f09..0d6d598 100644 (file)
@@ -35,7 +35,7 @@
  */
 
 #include "i915_drv.h"
-#include "i915_gem_fence_reg.h"
+#include "gt/intel_ggtt_fencing.h"
 #include "gvt.h"
 
 static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
index 480f756..9327d56 100644 (file)
@@ -1288,7 +1288,7 @@ static int i915_drm_resume(struct drm_device *dev)
                drm_err(&dev_priv->drm, "failed to re-enable GGTT\n");
 
        i915_ggtt_resume(&dev_priv->ggtt);
-       i915_gem_restore_fences(&dev_priv->ggtt);
+       intel_ggtt_restore_fences(&dev_priv->ggtt);
 
        intel_csr_ucode_resume(dev_priv);
 
@@ -1606,7 +1606,7 @@ static int intel_runtime_suspend(struct device *kdev)
 
                intel_gt_runtime_resume(&dev_priv->gt);
 
-               i915_gem_restore_fences(&dev_priv->ggtt);
+               intel_ggtt_restore_fences(&dev_priv->ggtt);
 
                enable_rpm_wakeref_asserts(rpm);
 
@@ -1687,7 +1687,7 @@ static int intel_runtime_resume(struct device *kdev)
         * we can do is to hope that things will still work (and disable RPM).
         */
        intel_gt_runtime_resume(&dev_priv->gt);
-       i915_gem_restore_fences(&dev_priv->ggtt);
+       intel_ggtt_restore_fences(&dev_priv->ggtt);
 
        /*
         * On VLV/CHV display interrupts are part of the display
index 1f5b9a5..ddd5b40 100644 (file)
@@ -92,7 +92,6 @@
 #include "intel_wopcm.h"
 
 #include "i915_gem.h"
-#include "i915_gem_fence_reg.h"
 #include "i915_gem_gtt.h"
 #include "i915_gpu_error.h"
 #include "i915_perf_types.h"
index ca54200..2c53be0 100644 (file)
@@ -1156,7 +1156,7 @@ err_unlock:
                /* Minimal basic recovery for KMS */
                ret = i915_ggtt_enable_hw(dev_priv);
                i915_ggtt_resume(&dev_priv->ggtt);
-               i915_gem_restore_fences(&dev_priv->ggtt);
+               intel_ggtt_restore_fences(&dev_priv->ggtt);
                intel_init_clock_gating(dev_priv);
        }
 
index e1ced1d..2764c27 100644 (file)
@@ -33,7 +33,6 @@
 #include "gem/i915_gem_object.h"
 
 #include "i915_gem_gtt.h"
-#include "i915_gem_fence_reg.h"
 
 #include "i915_active.h"
 #include "i915_request.h"
index 623759b..7ea517a 100644 (file)
@@ -125,7 +125,7 @@ static void pm_resume(struct drm_i915_private *i915)
         */
        with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
                i915_ggtt_resume(&i915->ggtt);
-               i915_gem_restore_fences(&i915->ggtt);
+               intel_ggtt_restore_fences(&i915->ggtt);
 
                i915_gem_resume(i915);
        }