net/mlx5: Fix setting number of EQs of SFs
authorShay Drory <shayd@nvidia.com>
Tue, 14 Sep 2021 07:13:02 +0000 (10:13 +0300)
committerSaeed Mahameed <saeedm@nvidia.com>
Thu, 30 Sep 2021 21:07:56 +0000 (14:07 -0700)
When setting number of completion EQs of the SF, consider number of
online CPUs.
Without this consideration, when number of online cpus are less than 8,
unnecessary 8 completion EQs are allocated.

Fixes: c36326d38d93 ("net/mlx5: Round-Robin EQs over IRQs")
Signed-off-by: Shay Drory <shayd@nvidia.com>
Reviewed-by: Parav Pandit <parav@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c

index df54f62a38ac385d3c99aa1cf9462ec98bc2a213..763c83a0238091ef55b7e13d78bc4dc41212be60 100644 (file)
@@ -633,8 +633,9 @@ void mlx5_irq_table_destroy(struct mlx5_core_dev *dev)
 int mlx5_irq_table_get_sfs_vec(struct mlx5_irq_table *table)
 {
        if (table->sf_comp_pool)
-               return table->sf_comp_pool->xa_num_irqs.max -
-                       table->sf_comp_pool->xa_num_irqs.min + 1;
+               return min_t(int, num_online_cpus(),
+                            table->sf_comp_pool->xa_num_irqs.max -
+                            table->sf_comp_pool->xa_num_irqs.min + 1);
        else
                return mlx5_irq_table_get_num_comp(table);
 }