* m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index af96f452e2541d0c8fe81da825cf0fb6f6e8af09..5b813c79154f22345a2b374a3be2fa6b79b9c87a 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,7 @@
 Wed Sep 24 11:29:35 1997  Ian Lance Taylor  <ian@cygnus.com>
 
+       * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire.
+
        * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32.
 
        * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr

diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c
index 00a10526158daf818073c2b54aab11d988995b3f..87ca0cd4a5285ce387aa020fab22a7f891ef869d 100644 (file)
--- a/opcodes/m68k-opc.c
+++ b/opcodes/m68k-opc.c
@@ -175,10 +175,13 @@ const struct m68k_opcode m68k_opcodes[] =
 {"jle",                one(0067400),   one(0177400), "Bg", m68000up | mcf5200 },
 
 {"bchg",       one(0000500),   one(0170700), "Dd$s", m68000up | mcf5200 },
-{"bchg",       one(0004100),   one(0177700), "#b$s", m68000up | mcf5200 },
+{"bchg",       one(0004100),   one(0177700), "#b$s", m68000up },
+{"bchg",       one(0004100),   one(0177700), "#bqs", mcf5200 },
 
-{"bclr",       one(0000600),   one(0170700), "Dd$s", m68000up | mcf5200 },
-{"bclr",       one(0004200),   one(0177700), "#b$s", m68000up | mcf5200 },
+{"bclr",       one(0000600),   one(0170700), "Dd$s", m68000up },
+{"bclr",       one(0000600),   one(0170700), "Ddvs", mcf5200 },
+{"bclr",       one(0004200),   one(0177700), "#b$s", m68000up },
+{"bclr",       one(0004200),   one(0177700), "#bqs", mcf5200 },
 
 {"bfchg",      two(0165300, 0), two(0177700, 0170000), "?sO2O3",   m68020up },
 {"bfclr",      two(0166300, 0), two(0177700, 0170000), "?sO2O3",   m68020up },
@@ -197,15 +200,18 @@ const struct m68k_opcode m68k_opcodes[] =
 {"bral",       one(0060377),   one(0177777), "BL", m68020up | cpu32 },
 {"bras",       one(0060000),   one(0177400), "BB", m68000up | mcf5200 },
 
-{"bset",       one(0000700),   one(0170700), "Dd$s", m68000up | mcf5200 },
-{"bset",       one(0004300),   one(0177700), "#b$s", m68000up | mcf5200 },
+{"bset",       one(0000700),   one(0170700), "Dd$s", m68000up },
+{"bset",       one(0000700),   one(0170700), "Ddvs", mcf5200 },
+{"bset",       one(0004300),   one(0177700), "#b$s", m68000up },
+{"bset",       one(0004300),   one(0177700), "#bqs", mcf5200 },
 
 {"bsrw",       one(0060400),   one(0177777), "BW", m68000up | mcf5200 },
 {"bsrl",       one(0060777),   one(0177777), "BL", m68020up | cpu32 },
 {"bsrs",       one(0060400),   one(0177400), "BB", m68000up | mcf5200 },
 
 {"btst",       one(0000400),   one(0170700), "Dd@s", m68000up | mcf5200 },
-{"btst",       one(0004000),   one(0177700), "#b@s", m68000up | mcf5200 },
+{"btst",       one(0004000),   one(0177700), "#b@s", m68000up },
+{"btst",       one(0004000),   one(0177700), "#bqs", mcf5200 },
 
 {"callm",      one(0003300),           one(0177700), "#b!s", m68020 },