drm/amd/display: Correct order of RV family clk managers for Renoir
authorRoman Li <Roman.Li@amd.com>
Thu, 8 Aug 2019 19:11:37 +0000 (15:11 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 29 Aug 2019 20:52:33 +0000 (15:52 -0500)
Need to check for renoir first.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c

index e211d4f655368b807257af3cbc8c9292fa360844..c43797bea4139de97d0b4b8e534ac8f802b01c4e 100644 (file)
@@ -111,6 +111,12 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p
 
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
        case FAMILY_RV:
+#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
+               if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)) {
+                       rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
+                       break;
+               }
+#endif /* DCN2_1 */
                if (ASICREV_IS_RAVEN2(asic_id.hw_internal_rev)) {
                        rv2_clk_mgr_construct(ctx, clk_mgr, pp_smu);
                        break;
@@ -120,12 +126,6 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p
                        rv1_clk_mgr_construct(ctx, clk_mgr, pp_smu);
                        break;
                }
-#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
-               if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)) {
-                       rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
-                       break;
-               }
-#endif /* DCN2_1 */
                break;
 #endif /* Family RV */