drm/amdgpu: Move vcn ras block init to ras sw_init

Initialize vcn ras block only when vcn ip block
supports ras features. Driver queries ras capabilities
after early_init, ras block init needs to be moved to
sw_int.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Stanley Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index 25217b0..0b1980a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -1162,19 +1162,28 @@ int amdgpu_vcn_process_poison_irq(struct amdgpu_device *adev,
        return 0;
 }
 
-void amdgpu_vcn_set_ras_funcs(struct amdgpu_device *adev)
+int amdgpu_vcn_ras_sw_init(struct amdgpu_device *adev)
 {
+       int err;
+       struct amdgpu_vcn_ras *ras;
+
        if (!adev->vcn.ras)
-               return;
+               return 0;
 
-       amdgpu_ras_register_ras_block(adev, &adev->vcn.ras->ras_block);
+       ras = adev->vcn.ras;
+       err = amdgpu_ras_register_ras_block(adev, &ras->ras_block);
+       if (err) {
+               dev_err(adev->dev, "Failed to register vcn ras block!\n");
+               return err;
+       }
 
-       strcpy(adev->vcn.ras->ras_block.ras_comm.name, "vcn");
-       adev->vcn.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__VCN;
-       adev->vcn.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON;
-       adev->vcn.ras_if = &adev->vcn.ras->ras_block.ras_comm;
+       strcpy(ras->ras_block.ras_comm.name, "vcn");
+       ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__VCN;
+       ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON;
+       adev->vcn.ras_if = &ras->ras_block.ras_comm;
 
-       /* If don't define special ras_late_init function, use default ras_late_init */
-       if (!adev->vcn.ras->ras_block.ras_late_init)
-               adev->vcn.ras->ras_block.ras_late_init = amdgpu_ras_block_late_init;
+       if (!ras->ras_block.ras_late_init)
+               ras->ras_block.ras_late_init = amdgpu_ras_block_late_init;
+
+       return 0;
 }

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
index d3e2af9..c730949 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
@@ -400,6 +400,6 @@ void amdgpu_debugfs_vcn_fwlog_init(struct amdgpu_device *adev,
 int amdgpu_vcn_process_poison_irq(struct amdgpu_device *adev,
                        struct amdgpu_irq_src *source,
                        struct amdgpu_iv_entry *entry);
-void amdgpu_vcn_set_ras_funcs(struct amdgpu_device *adev);
+int amdgpu_vcn_ras_sw_init(struct amdgpu_device *adev);
 
 #endif

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index b0b0e69..223e7df 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
@@ -225,6 +225,10 @@ static int vcn_v2_5_sw_init(void *handle)
        if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)
                adev->vcn.pause_dpg_mode = vcn_v2_5_pause_dpg_mode;
 
+       r = amdgpu_vcn_ras_sw_init(adev);
+       if (r)
+               return r;
+
        return 0;
 }
 
@@ -2031,6 +2035,4 @@ static void vcn_v2_5_set_ras_funcs(struct amdgpu_device *adev)
        default:
                break;
        }
-
-       amdgpu_vcn_set_ras_funcs(adev);
 }

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
index 43d5874..720ab36 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
@@ -181,6 +181,10 @@ static int vcn_v4_0_sw_init(void *handle)
        if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)
                adev->vcn.pause_dpg_mode = vcn_v4_0_pause_dpg_mode;
 
+       r = amdgpu_vcn_ras_sw_init(adev);
+       if (r)
+               return r;
+
        return 0;
 }
 
@@ -2123,6 +2127,4 @@ static void vcn_v4_0_set_ras_funcs(struct amdgpu_device *adev)
        default:
                break;
        }
-
-       amdgpu_vcn_set_ras_funcs(adev);
 }