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intel/disasm/gfx12+: Fix print out of non-existing condmod field with 64-bit immediate.
author
Francisco Jerez
<currojerez@riseup.net>
Wed, 4 Jan 2023 20:52:45 +0000
(12:52 -0800)
committer
Marge Bot
<emma+marge@anholt.net>
Thu, 19 Jan 2023 06:14:03 +0000
(06:14 +0000)
The conditional mode field doesn't exist for instructions with a
64-bit immediate, so this would currently print garbage.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20543>
src/intel/compiler/brw_disasm.c
patch
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diff --git
a/src/intel/compiler/brw_disasm.c
b/src/intel/compiler/brw_disasm.c
index
4408a6b
..
1603919
100644
(file)
--- a/
src/intel/compiler/brw_disasm.c
+++ b/
src/intel/compiler/brw_disasm.c
@@
-1964,7
+1964,10
@@
brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa,
err |= control(file, "function", sync_function,
brw_inst_cond_modifier(devinfo, inst), NULL);
- } else if (!is_send(opcode)) {
+ } else if (!is_send(opcode) &&
+ (devinfo->ver < 12 ||
+ brw_inst_src0_reg_file(devinfo, inst) != BRW_IMMEDIATE_VALUE ||
+ type_sz(brw_inst_src0_type(devinfo, inst)) < 8)) {
err |= control(file, "conditional modifier", conditional_modifier,
brw_inst_cond_modifier(devinfo, inst), NULL);