{
si_program_jump_on_start(adev);
si_start_smc(adev);
- si_start_smc_clock(adev);
+ si_smc_clock(adev, true);
}
static void si_dpm_stop_smc(struct amdgpu_device *adev)
{
si_reset_smc(adev);
- si_stop_smc_clock(adev);
+ si_smc_clock(adev, false);
}
static int si_process_firmware_header(struct amdgpu_device *adev)
struct si_power_info *si_pi = si_get_pi(adev);
si_reset_smc(adev);
- si_stop_smc_clock(adev);
+ si_smc_clock(adev, false);
return si_load_smc_ucode(adev, si_pi->sram_end);
}
goto done;
original_data = RREG32(SMC_IND_DATA_0);
-
extra_shift = 8 * (4 - byte_count);
while (byte_count > 0) {
}
data <<= extra_shift;
-
data |= (original_data & ~((~0UL) << extra_shift));
ret = si_set_smc_sram_address(adev, addr, limit);
RREG32(CB_CGTT_SCLK_CTRL);
RREG32(CB_CGTT_SCLK_CTRL);
- tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL);
- tmp |= RST_REG;
+ tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL) |
+ RST_REG;
WREG32_SMC(SMC_SYSCON_RESET_CNTL, tmp);
}
return si_copy_bytes_to_smc(adev, 0x0, data, 4, sizeof(data)+1);
}
-void si_stop_smc_clock(struct amdgpu_device *adev)
-{
- u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);
-
- tmp |= CK_DISABLE;
-
- WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);
-}
-
-void si_start_smc_clock(struct amdgpu_device *adev)
+void si_smc_clock(struct amdgpu_device *adev, bool enable)
{
u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0);
- tmp &= ~CK_DISABLE;
+ if (enable)
+ tmp &= ~CK_DISABLE;
+ else
+ tmp |= CK_DISABLE;
WREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0, tmp);
}
break;
udelay(1);
}
- tmp = RREG32(SMC_RESP_0);
- return (PPSMC_Result)tmp;
+ return (PPSMC_Result)RREG32(SMC_RESP_0);
}
PPSMC_Result si_wait_for_smc_inactive(struct amdgpu_device *adev)
void si_start_smc(struct amdgpu_device *adev);
void si_reset_smc(struct amdgpu_device *adev);
int si_program_jump_on_start(struct amdgpu_device *adev);
-void si_stop_smc_clock(struct amdgpu_device *adev);
-void si_start_smc_clock(struct amdgpu_device *adev);
+void si_smc_clock(struct amdgpu_device *adev, bool enable);
bool si_is_smc_running(struct amdgpu_device *adev);
PPSMC_Result si_send_msg_to_smc(struct amdgpu_device *adev, PPSMC_Msg msg);
PPSMC_Result si_wait_for_smc_inactive(struct amdgpu_device *adev);