media: v4l: fwnode: C-PHY has no clock lane
authorSakari Ailus <sakari.ailus@linux.intel.com>
Fri, 3 May 2019 10:39:41 +0000 (06:39 -0400)
committerMauro Carvalho Chehab <mchehab+samsung@kernel.org>
Thu, 23 May 2019 14:18:18 +0000 (10:18 -0400)
C-PHY doesn't use a clock lane, hence the test for the clock lane when
there isn't one is faulty. Rework the test for the conflicting clock lane.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
drivers/media/v4l2-core/v4l2-fwnode.c

index ea1ed88..dea8917 100644 (file)
@@ -212,10 +212,10 @@ static int v4l2_fwnode_endpoint_parse_csi2_bus(struct fwnode_handle *fwnode,
                have_clk_lane = true;
        }
 
-       if (lanes_used & BIT(clock_lane)) {
-               if (have_clk_lane || !use_default_lane_mapping)
-                       pr_warn("duplicated lane %u in clock-lanes, using defaults\n",
-                               v);
+       if (have_clk_lane && lanes_used & BIT(clock_lane) &&
+           !use_default_lane_mapping) {
+               pr_warn("duplicated lane %u in clock-lanes, using defaults\n",
+                       v);
                use_default_lane_mapping = true;
        }