[AArch64] This check is specific to merging instructions. NFC.

llvm-svn: 260283

diff --git a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
index 9d5098c..04fadf9 100644 (file)
--- a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -1149,10 +1149,6 @@ AArch64LoadStoreOpt::findMatchingInsn(MachineBasicBlock::iterator I,
   int Offset = getLdStOffsetOp(FirstMI).getImm();
   bool IsNarrowStore = isNarrowStore(Opc);
 
-  // For narrow stores, find only the case where the stored value is WZR.
-  if (IsNarrowStore && Reg != AArch64::WZR)
-    return E;
-
   // Early exit if the offset is not possible to match. (6 bits of positive
   // range, plus allow an extra one in case we find a later insn that matches
   // with Offset-1)
@@ -1582,6 +1578,10 @@ bool AArch64LoadStoreOpt::tryToMergeLdStInst(
   if (!isCandidateToMergeOrPair(MI))
     return false;
 
+  // For narrow stores, find only the case where the stored value is WZR.
+  if (isNarrowStore(MI) && getLdStRegOp(MI).getReg() != AArch64::WZR)
+    return false;
+
   // Look ahead up to LdStLimit instructions for a mergable instruction.
   LdStPairFlags Flags;
   MachineBasicBlock::iterator MergeMI = findMatchingInsn(MBBI, Flags, LdStLimit);