#define V4L2_SUBDEV_SEL_FLAG_SIZE_LE V4L2_SEL_FLAG_LE
#define V4L2_SUBDEV_SEL_FLAG_KEEP_CONFIG V4L2_SEL_FLAG_KEEP_CONFIG
+struct v4l2_edid {
+ __u32 pad;
+ __u32 start_block;
+ __u32 blocks;
+ __u32 reserved[5];
+ __u8 __user *edid;
+};
+
#endif /* __V4L2_COMMON__ */
#define V4L2_FLASH_FAULT_SHORT_CIRCUIT (1 << 3)
#define V4L2_FLASH_FAULT_OVER_CURRENT (1 << 4)
#define V4L2_FLASH_FAULT_INDICATOR (1 << 5)
+#define V4L2_FLASH_FAULT_UNDER_VOLTAGE (1 << 6)
+#define V4L2_FLASH_FAULT_INPUT_VOLTAGE (1 << 7)
+#define V4L2_FLASH_FAULT_LED_OVER_TEMPERATURE (1 << 8)
#define V4L2_CID_FLASH_CHARGE (V4L2_CID_FLASH_CLASS_BASE + 11)
#define V4L2_CID_FLASH_READY (V4L2_CID_FLASH_CLASS_BASE + 12)
#define V4L2_CID_RF_TUNER_CLASS_BASE (V4L2_CTRL_CLASS_RF_TUNER | 0x900)
#define V4L2_CID_RF_TUNER_CLASS (V4L2_CTRL_CLASS_RF_TUNER | 1)
-#define V4L2_CID_RF_TUNER_LNA_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 1)
-#define V4L2_CID_RF_TUNER_LNA_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 2)
-#define V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 3)
-#define V4L2_CID_RF_TUNER_MIXER_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 4)
-#define V4L2_CID_RF_TUNER_IF_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 5)
-#define V4L2_CID_RF_TUNER_IF_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 6)
+#define V4L2_CID_RF_TUNER_BANDWIDTH_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 11)
+#define V4L2_CID_RF_TUNER_BANDWIDTH (V4L2_CID_RF_TUNER_CLASS_BASE + 12)
+#define V4L2_CID_RF_TUNER_LNA_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 41)
+#define V4L2_CID_RF_TUNER_LNA_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 42)
+#define V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 51)
+#define V4L2_CID_RF_TUNER_MIXER_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 52)
+#define V4L2_CID_RF_TUNER_IF_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 61)
+#define V4L2_CID_RF_TUNER_IF_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 62)
+#define V4L2_CID_RF_TUNER_PLL_LOCK (V4L2_CID_RF_TUNER_CLASS_BASE + 91)
#endif
#define V4L2_PIX_FMT_SE401 v4l2_fourcc('S', '4', '0', '1') /* se401 janggu compressed rgb */
#define V4L2_PIX_FMT_S5C_UYVY_JPG v4l2_fourcc('S', '5', 'C', 'I') /* S5C73M3 interleaved UYVY/JPEG */
+/* SDR formats - used only for Software Defined Radio devices */
+#define V4L2_SDR_FMT_CU8 v4l2_fourcc('C', 'U', '0', '8') /* IQ u8 */
+#define V4L2_SDR_FMT_CU16LE v4l2_fourcc('C', 'U', '1', '6') /* IQ u16le */
+
/*
* F O R M A T E N U M E R A T I O N
*/
} __attribute__ ((packed));
/**
- * struct v4l2_format_sdr - SDR format definition
+ * struct v4l2_sdr_format - SDR format definition
* @pixelformat: little endian four character code (fourcc)
*/
-struct v4l2_format_sdr {
+struct v4l2_sdr_format {
uint32_t pixelformat;
uint8_t reserved[28];
} __attribute__ ((packed));
struct v4l2_window win; /* V4L2_BUF_TYPE_VIDEO_OVERLAY */
struct v4l2_vbi_format vbi; /* V4L2_BUF_TYPE_VBI_CAPTURE */
struct v4l2_sliced_vbi_format sliced; /* V4L2_BUF_TYPE_SLICED_VBI_CAPTURE */
- struct v4l2_format_sdr sdr; /* V4L2_BUF_TYPE_SDR_CAPTURE */
+ struct v4l2_sdr_format sdr; /* V4L2_BUF_TYPE_SDR_CAPTURE */
uint8_t raw_data[200]; /* user-defined */
} fmt;
};
#define VIDIOC_QUERYMENU _IOWR('V', 37, struct v4l2_querymenu)
#define VIDIOC_G_INPUT _IOR('V', 38, int)
#define VIDIOC_S_INPUT _IOWR('V', 39, int)
+#define VIDIOC_G_EDID _IOWR('V', 40, struct v4l2_edid)
+#define VIDIOC_S_EDID _IOWR('V', 41, struct v4l2_edid)
#define VIDIOC_G_OUTPUT _IOR('V', 46, int)
#define VIDIOC_S_OUTPUT _IOWR('V', 47, int)
#define VIDIOC_ENUMOUTPUT _IOWR('V', 48, struct v4l2_output)
}
printf "/* This file is auto-generated by make sync-with-kernel */\n";
+printf "#include <linux/compiler.h>\n";
foreach my $h (sort keys %headers) {
my $line;
/* This file is auto-generated by make sync-with-kernel */
+#include <linux/compiler.h>
#include "linux/dvb/dmx.h"
#include "linux/dvb/frontend.h"
#include "linux/v4l2-subdev.h"
struct v4l2_decoder_cmd p_v4l2_decoder_cmd;
struct v4l2_dv_timings p_v4l2_dv_timings;
struct v4l2_dv_timings_cap p_v4l2_dv_timings_cap;
+ struct v4l2_edid p_v4l2_edid;
struct v4l2_enc_idx p_v4l2_enc_idx;
struct v4l2_encoder_cmd p_v4l2_encoder_cmd;
struct v4l2_enum_dv_timings p_v4l2_enum_dv_timings;
struct v4l2_standard p_v4l2_standard;
struct v4l2_streamparm p_v4l2_streamparm;
struct v4l2_subdev_crop p_v4l2_subdev_crop;
- struct v4l2_subdev_edid p_v4l2_subdev_edid;
struct v4l2_subdev_format p_v4l2_subdev_format;
struct v4l2_subdev_frame_interval p_v4l2_subdev_frame_interval;
struct v4l2_subdev_frame_interval_enum p_v4l2_subdev_frame_interval_enum;
ioc(video, VIDIOC_G_CROP), /* struct v4l2_crop */
ioc(video, VIDIOC_G_CTRL), /* struct v4l2_control */
ioc(video, VIDIOC_G_DV_TIMINGS), /* struct v4l2_dv_timings */
+ ioc(video, VIDIOC_G_EDID), /* struct v4l2_edid */
ioc(video, VIDIOC_G_ENC_INDEX), /* struct v4l2_enc_idx */
ioc(video, VIDIOC_G_EXT_CTRLS), /* struct v4l2_ext_controls */
ioc(video, VIDIOC_G_FBUF), /* struct v4l2_framebuffer */
ioc(subdev, VIDIOC_SUBDEV_ENUM_FRAME_SIZE), /* struct v4l2_subdev_frame_size_enum */
ioc(subdev, VIDIOC_SUBDEV_ENUM_MBUS_CODE), /* struct v4l2_subdev_mbus_code_enum */
ioc(subdev, VIDIOC_SUBDEV_G_CROP), /* struct v4l2_subdev_crop */
- ioc(subdev, VIDIOC_SUBDEV_G_EDID), /* struct v4l2_subdev_edid */
+ ioc(subdev, VIDIOC_SUBDEV_G_EDID), /* struct v4l2_edid */
ioc(subdev, VIDIOC_SUBDEV_G_FMT), /* struct v4l2_subdev_format */
ioc(subdev, VIDIOC_SUBDEV_G_FRAME_INTERVAL), /* struct v4l2_subdev_frame_interval */
ioc(subdev, VIDIOC_SUBDEV_G_SELECTION), /* struct v4l2_subdev_selection */
ioc(subdev, VIDIOC_SUBDEV_S_CROP), /* struct v4l2_subdev_crop */
- ioc(subdev, VIDIOC_SUBDEV_S_EDID), /* struct v4l2_subdev_edid */
+ ioc(subdev, VIDIOC_SUBDEV_S_EDID), /* struct v4l2_edid */
ioc(subdev, VIDIOC_SUBDEV_S_FMT), /* struct v4l2_subdev_format */
ioc(subdev, VIDIOC_SUBDEV_S_FRAME_INTERVAL), /* struct v4l2_subdev_frame_interval */
ioc(subdev, VIDIOC_SUBDEV_S_SELECTION), /* struct v4l2_subdev_selection */
ioc(video, VIDIOC_S_CROP), /* struct v4l2_crop */
ioc(video, VIDIOC_S_CTRL), /* struct v4l2_control */
ioc(video, VIDIOC_S_DV_TIMINGS), /* struct v4l2_dv_timings */
+ ioc(video, VIDIOC_S_EDID), /* struct v4l2_edid */
ioc(video, VIDIOC_S_EXT_CTRLS), /* struct v4l2_ext_controls */
ioc(video, VIDIOC_S_FBUF), /* struct v4l2_framebuffer */
ioc(video, VIDIOC_S_FMT), /* struct v4l2_format */
#define CMD32_VIDIOC_G_CROP 0xc014563b
#define CMD32_VIDIOC_G_CTRL 0xc008561b
#define CMD32_VIDIOC_G_DV_TIMINGS 0xc0845658
+#define CMD32_VIDIOC_G_EDID 0xc0245628
#define CMD32_VIDIOC_G_ENC_INDEX 0x8818564c
#define CMD32_VIDIOC_G_EXT_CTRLS 0xc0185647
#define CMD32_VIDIOC_G_FBUF 0x802c560a
#define CMD32_VIDIOC_S_CROP 0x4014563c
#define CMD32_VIDIOC_S_CTRL 0xc008561c
#define CMD32_VIDIOC_S_DV_TIMINGS 0xc0845657
+#define CMD32_VIDIOC_S_EDID 0xc0245629
#define CMD32_VIDIOC_S_EXT_CTRLS 0xc0185648
#define CMD32_VIDIOC_S_FBUF 0x402c560b
#define CMD32_VIDIOC_S_FMT 0xc0cc5605
#define CMD64_VIDIOC_G_CROP 0xc014563b
#define CMD64_VIDIOC_G_CTRL 0xc008561b
#define CMD64_VIDIOC_G_DV_TIMINGS 0xc0845658
+#define CMD64_VIDIOC_G_EDID 0xc0285628
#define CMD64_VIDIOC_G_ENC_INDEX 0x8818564c
#define CMD64_VIDIOC_G_EXT_CTRLS 0xc0205647
#define CMD64_VIDIOC_G_FBUF 0x8030560a
#define CMD64_VIDIOC_S_CROP 0x4014563c
#define CMD64_VIDIOC_S_CTRL 0xc008561c
#define CMD64_VIDIOC_S_DV_TIMINGS 0xc0845657
+#define CMD64_VIDIOC_S_EDID 0xc0285629
#define CMD64_VIDIOC_S_EXT_CTRLS 0xc0205648
#define CMD64_VIDIOC_S_FBUF 0x4030560b
#define CMD64_VIDIOC_S_FMT 0xc0d05605
#define V4L2_SUBDEV_SEL_FLAG_SIZE_LE V4L2_SEL_FLAG_LE
#define V4L2_SUBDEV_SEL_FLAG_KEEP_CONFIG V4L2_SEL_FLAG_KEEP_CONFIG
+struct v4l2_edid {
+ __u32 pad;
+ __u32 start_block;
+ __u32 blocks;
+ __u32 reserved[5];
+ __u8 __user *edid;
+};
+
#endif /* __V4L2_COMMON__ */
#define V4L2_FLASH_FAULT_SHORT_CIRCUIT (1 << 3)
#define V4L2_FLASH_FAULT_OVER_CURRENT (1 << 4)
#define V4L2_FLASH_FAULT_INDICATOR (1 << 5)
+#define V4L2_FLASH_FAULT_UNDER_VOLTAGE (1 << 6)
+#define V4L2_FLASH_FAULT_INPUT_VOLTAGE (1 << 7)
+#define V4L2_FLASH_FAULT_LED_OVER_TEMPERATURE (1 << 8)
#define V4L2_CID_FLASH_CHARGE (V4L2_CID_FLASH_CLASS_BASE + 11)
#define V4L2_CID_FLASH_READY (V4L2_CID_FLASH_CLASS_BASE + 12)
#define V4L2_CID_RF_TUNER_CLASS_BASE (V4L2_CTRL_CLASS_RF_TUNER | 0x900)
#define V4L2_CID_RF_TUNER_CLASS (V4L2_CTRL_CLASS_RF_TUNER | 1)
-#define V4L2_CID_RF_TUNER_LNA_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 1)
-#define V4L2_CID_RF_TUNER_LNA_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 2)
-#define V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 3)
-#define V4L2_CID_RF_TUNER_MIXER_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 4)
-#define V4L2_CID_RF_TUNER_IF_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 5)
-#define V4L2_CID_RF_TUNER_IF_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 6)
+#define V4L2_CID_RF_TUNER_BANDWIDTH_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 11)
+#define V4L2_CID_RF_TUNER_BANDWIDTH (V4L2_CID_RF_TUNER_CLASS_BASE + 12)
+#define V4L2_CID_RF_TUNER_LNA_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 41)
+#define V4L2_CID_RF_TUNER_LNA_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 42)
+#define V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 51)
+#define V4L2_CID_RF_TUNER_MIXER_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 52)
+#define V4L2_CID_RF_TUNER_IF_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 61)
+#define V4L2_CID_RF_TUNER_IF_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 62)
+#define V4L2_CID_RF_TUNER_PLL_LOCK (V4L2_CID_RF_TUNER_CLASS_BASE + 91)
#endif
__u32 reserved[8];
};
-struct v4l2_subdev_edid {
- __u32 pad;
- __u32 start_block;
- __u32 blocks;
- __u32 reserved[5];
- __u8 __user *edid;
-};
+/* Backwards compatibility define --- to be removed */
+#define v4l2_subdev_edid v4l2_edid
#define VIDIOC_SUBDEV_G_FMT _IOWR('V', 4, struct v4l2_subdev_format)
#define VIDIOC_SUBDEV_S_FMT _IOWR('V', 5, struct v4l2_subdev_format)
_IOWR('V', 61, struct v4l2_subdev_selection)
#define VIDIOC_SUBDEV_S_SELECTION \
_IOWR('V', 62, struct v4l2_subdev_selection)
-#define VIDIOC_SUBDEV_G_EDID _IOWR('V', 40, struct v4l2_subdev_edid)
-#define VIDIOC_SUBDEV_S_EDID _IOWR('V', 41, struct v4l2_subdev_edid)
+/* These two G/S_EDID ioctls are identical to the ioctls in videodev2.h */
+#define VIDIOC_SUBDEV_G_EDID _IOWR('V', 40, struct v4l2_edid)
+#define VIDIOC_SUBDEV_S_EDID _IOWR('V', 41, struct v4l2_edid)
#endif
#define V4L2_PIX_FMT_SE401 v4l2_fourcc('S', '4', '0', '1') /* se401 janggu compressed rgb */
#define V4L2_PIX_FMT_S5C_UYVY_JPG v4l2_fourcc('S', '5', 'C', 'I') /* S5C73M3 interleaved UYVY/JPEG */
+/* SDR formats - used only for Software Defined Radio devices */
+#define V4L2_SDR_FMT_CU8 v4l2_fourcc('C', 'U', '0', '8') /* IQ u8 */
+#define V4L2_SDR_FMT_CU16LE v4l2_fourcc('C', 'U', '1', '6') /* IQ u16le */
+
/*
* F O R M A T E N U M E R A T I O N
*/
} __attribute__ ((packed));
/**
- * struct v4l2_format_sdr - SDR format definition
+ * struct v4l2_sdr_format - SDR format definition
* @pixelformat: little endian four character code (fourcc)
*/
-struct v4l2_format_sdr {
+struct v4l2_sdr_format {
__u32 pixelformat;
__u8 reserved[28];
} __attribute__ ((packed));
struct v4l2_window win; /* V4L2_BUF_TYPE_VIDEO_OVERLAY */
struct v4l2_vbi_format vbi; /* V4L2_BUF_TYPE_VBI_CAPTURE */
struct v4l2_sliced_vbi_format sliced; /* V4L2_BUF_TYPE_SLICED_VBI_CAPTURE */
- struct v4l2_format_sdr sdr; /* V4L2_BUF_TYPE_SDR_CAPTURE */
+ struct v4l2_sdr_format sdr; /* V4L2_BUF_TYPE_SDR_CAPTURE */
__u8 raw_data[200]; /* user-defined */
} fmt;
};
#define VIDIOC_QUERYMENU _IOWR('V', 37, struct v4l2_querymenu)
#define VIDIOC_G_INPUT _IOR('V', 38, int)
#define VIDIOC_S_INPUT _IOWR('V', 39, int)
+#define VIDIOC_G_EDID _IOWR('V', 40, struct v4l2_edid)
+#define VIDIOC_S_EDID _IOWR('V', 41, struct v4l2_edid)
#define VIDIOC_G_OUTPUT _IOR('V', 46, int)
#define VIDIOC_S_OUTPUT _IOWR('V', 47, int)
#define VIDIOC_ENUMOUTPUT _IOWR('V', 48, struct v4l2_output)
# devices supported by the linux kernel
#driver table file
-* rc-avermedia-dvbt avermedia_dvbt
-* rc-msi-digivox-ii msi_digivox_ii
-* rc-budget-ci-old budget_ci_old
-* rc-ati-tv-wonder-hd-600 ati_tv_wonder_hd_600
-* rc-winfast winfast
-* rc-dntv-live-dvb-t dntv_live_dvb_t
-* rc-gotview7135 gotview7135
-* rc-cinergy cinergy
-* rc-kaiomy kaiomy
-* rc-digitalnow-tinytwin digitalnow_tinytwin
-* rc-behold behold
-* rc-avertv-303 avertv_303
-* rc-it913x-v2 it913x_v2
-* rc-terratec-slim-2 terratec_slim_2
-* rc-fusionhdtv-mce fusionhdtv_mce
-* rc-encore-enltv-fm53 encore_enltv_fm53
-* rc-streamzap streamzap
+* rc-digittrade digittrade
* rc-powercolor-real-angel powercolor_real_angel
-* rc-genius-tvgo-a11mce genius_tvgo_a11mce
-* rc-flyvideo flyvideo
-* rc-adstech-dvb-t-pci adstech_dvb_t_pci
-* rc-msi-digivox-iii msi_digivox_iii
-* rc-avermedia-m135a avermedia_m135a
-* rc-tevii-nec tevii_nec
-* rc-dntv-live-dvbt-pro dntv_live_dvbt_pro
-* rc-encore-enltv encore_enltv
-* rc-terratec-slim terratec_slim
+* rc-budget-ci-old budget_ci_old
+* rc-imon-pad imon_pad
+* rc-eztv eztv
+* rc-msi-tvanywhere-plus msi_tvanywhere_plus
+* rc-pixelview-002t pixelview_002t
+* rc-tbs-nec tbs_nec
+* rc-delock-61959 delock_61959
* rc-total-media-in-hand total_media_in_hand
-* rc-gadmei-rm008z gadmei_rm008z
-* rc-kworld-plus-tv-analog kworld_plus_tv_analog
-* rc-trekstor trekstor
-* rc-kworld-pc150u kworld_pc150u
-* rc-ati-x10 ati_x10
-* rc-iodata-bctv7e iodata_bctv7e
-* rc-rc6-mce rc6_mce
* rc-technisat-usb2 technisat_usb2
-* rc-hauppauge hauppauge
-* rc-terratec-cinergy-xs terratec_cinergy_xs
-* rc-tbs-nec tbs_nec
+* rc-kworld-315u kworld_315u
+* rc-avermedia-rm-ks avermedia_rm_ks
+* rc-msi-digivox-ii msi_digivox_ii
* rc-norwood norwood
-* rc-npgtech npgtech
-* rc-pinnacle-color pinnacle_color
-* rc-pinnacle-grey pinnacle_grey
+* rc-nec-terratec-cinergy-xs nec_terratec_cinergy_xs
+* rc-su3000 su3000
+* rc-videomate-s350 videomate_s350
+* rc-digitalnow-tinytwin digitalnow_tinytwin
+* rc-rc6-mce rc6_mce
* rc-avermedia-cardbus avermedia_cardbus
-* rc-videomate-tv-pvr videomate_tv_pvr
-* rc-pixelview pixelview
+* rc-dib0700-nec dib0700_nec
* rc-nebula nebula
-* rc-leadtek-y04g0051 leadtek_y04g0051
-* rc-avermedia-m733a-rm-k6 avermedia_m733a_rm_k6
-* rc-pixelview-new pixelview_new
-* rc-manli manli
-* rc-delock-61959 delock_61959
+* rc-terratec-slim terratec_slim
* rc-videomate-k100 videomate_k100
-* rc-winfast-usbii-deluxe winfast_usbii_deluxe
+* rc-medion-x10-or2x medion_x10_or2x
+* rc-cinergy-1400 cinergy_1400
+* rc-dm1105-nec dm1105_nec
+* rc-terratec-slim-2 terratec_slim_2
+* rc-flydvb flydvb
+* rc-pinnacle-pctv-hd pinnacle_pctv_hd
* rc-pctv-sedna pctv_sedna
-* rc-avermedia-a16d avermedia_a16d
-* rc-imon-pad imon_pad
-* rc-encore-enltv2 encore_enltv2
-* rc-nec-terratec-cinergy-xs nec_terratec_cinergy_xs
* rc-it913x-v1 it913x_v1
-* rc-apac-viewcomp apac_viewcomp
-* rc-eztv eztv
-* rc-proteus-2309 proteus_2309
-* rc-msi-tvanywhere msi_tvanywhere
-* rc-dib0700-nec dib0700_nec
-* rc-medion-x10-digitainer medion_x10_digitainer
-* rc-imon-mce imon_mce
-* rc-tivo tivo
-* rc-medion-x10 medion_x10
+* rc-avermedia avermedia
+* rc-iodata-bctv7e iodata_bctv7e
+* rc-real-audio-220-32-keys real_audio_220_32_keys
+* rc-asus-ps3-100 asus_ps3_100
* rc-pv951 pv951
-* rc-total-media-in-hand-02 total_media_in_hand_02
-* rc-pixelview-002t pixelview_002t
+* rc-avermedia-m135a avermedia_m135a
* rc-reddo reddo
-* rc-pinnacle-pctv-hd pinnacle_pctv_hd
-* rc-purpletv purpletv
+* rc-kworld-pc150u kworld_pc150u
+* rc-kaiomy kaiomy
+* rc-avermedia-dvbt avermedia_dvbt
* rc-azurewave-ad-tu700 azurewave_ad_tu700
-* rc-su3000 su3000
-* rc-avermedia avermedia
-* rc-evga-indtube evga_indtube
-* rc-avermedia-rm-ks avermedia_rm_ks
-* rc-kworld-315u kworld_315u
+* rc-dntv-live-dvb-t dntv_live_dvb_t
+* rc-cinergy cinergy
+* rc-npgtech npgtech
+* rc-leadtek-y04g0051 leadtek_y04g0051
+* rc-manli manli
+* rc-streamzap streamzap
+* rc-winfast-usbii-deluxe winfast_usbii_deluxe
+* rc-behold behold
+* rc-gadmei-rm008z gadmei_rm008z
+* rc-purpletv purpletv
+* rc-it913x-v2 it913x_v2
+* rc-adstech-dvb-t-pci adstech_dvb_t_pci
+* rc-terratec-cinergy-xs terratec_cinergy_xs
+* rc-dntv-live-dvbt-pro dntv_live_dvbt_pro
+* rc-flyvideo flyvideo
+* rc-tivo tivo
+* rc-trekstor trekstor
+* rc-em-terratec em_terratec
+* rc-gotview7135 gotview7135
+* rc-msi-tvanywhere msi_tvanywhere
+* rc-alink-dtu-m alink_dtu_m
+* rc-videomate-tv-pvr videomate_tv_pvr
+* rc-avertv-303 avertv_303
+* rc-ati-tv-wonder-hd-600 ati_tv_wonder_hd_600
+* rc-ati-x10 ati_x10
+* rc-medion-x10-digitainer medion_x10_digitainer
+* rc-dib0700-rc5 dib0700_rc5
+* rc-medion-x10 medion_x10
+* rc-genius-tvgo-a11mce genius_tvgo_a11mce
+* rc-avermedia-a16d avermedia_a16d
* rc-behold-columbus behold_columbus
+* rc-pinnacle-grey pinnacle_grey
+* rc-imon-mce imon_mce
+* rc-snapstream-firefly snapstream_firefly
+* rc-hauppauge hauppauge
+* rc-asus-pc39 asus_pc39
+* rc-kworld-plus-tv-analog kworld_plus_tv_analog
+* rc-fusionhdtv-mce fusionhdtv_mce
+* rc-encore-enltv-fm53 encore_enltv_fm53
+* rc-evga-indtube evga_indtube
+* rc-total-media-in-hand-02 total_media_in_hand_02
+* rc-msi-digivox-iii msi_digivox_iii
+* rc-lme2510 lme2510
+* rc-winfast winfast
* rc-pixelview-mk12 pixelview_mk12
-* rc-dib0700-rc5 dib0700_rc5
-* rc-tt-1500 tt_1500
-* rc-em-terratec em_terratec
-* rc-flydvb flydvb
-* rc-cinergy-1400 cinergy_1400
-* rc-videomate-s350 videomate_s350
+* rc-encore-enltv encore_enltv
* rc-anysee anysee
-* rc-asus-pc39 asus_pc39
-* rc-digittrade digittrade
+* rc-pixelview-new pixelview_new
* rc-twinhan1027 twinhan_vp1027_dvbs
-* rc-real-audio-220-32-keys real_audio_220_32_keys
-* rc-medion-x10-or2x medion_x10_or2x
-* rc-snapstream-firefly snapstream_firefly
-* rc-lme2510 lme2510
-* rc-dm1105-nec dm1105_nec
-* rc-asus-ps3-100 asus_ps3_100
-* rc-alink-dtu-m alink_dtu_m
-* rc-msi-tvanywhere-plus msi_tvanywhere_plus
+* rc-tevii-nec tevii_nec
+* rc-apac-viewcomp apac_viewcomp
+* rc-pinnacle-color pinnacle_color
+* rc-encore-enltv2 encore_enltv2
+* rc-pixelview pixelview
+* rc-avermedia-m733a-rm-k6 avermedia_m733a_rm_k6
+* rc-tt-1500 tt_1500
+* rc-proteus-2309 proteus_2309
# * * a800 # found in a800.c
# * * af9005 # found in af9005-remote.c
# * * cinergyt2 # found in cinergyT2-core.c
struct v4l2_window &win = fmt.fmt.win;
struct v4l2_vbi_format &vbi = fmt.fmt.vbi;
struct v4l2_sliced_vbi_format &sliced = fmt.fmt.sliced;
- struct v4l2_format_sdr &sdr = fmt.fmt.sdr;
+ struct v4l2_sdr_format &sdr = fmt.fmt.sdr;
unsigned min_data_samples;
unsigned min_sampling_rate;
v4l2_std_id std;
struct v4l2_pix_format *p2 = &fmt2.fmt.pix;
struct v4l2_pix_format_mplane *mp1 = &fmt1.fmt.pix_mp;
struct v4l2_pix_format_mplane *mp2 = &fmt2.fmt.pix_mp;
- struct v4l2_format_sdr *sdr1 = &fmt1.fmt.sdr;
- struct v4l2_format_sdr *sdr2 = &fmt2.fmt.sdr;
+ struct v4l2_sdr_format *sdr1 = &fmt1.fmt.sdr;
+ struct v4l2_sdr_format *sdr2 = &fmt2.fmt.sdr;
__u32 pixfmt1, pixfmt2;
__u32 w1 = 0, w2 = 0, h1 = 0, h2 = 0;