x86/mm/pae: Use WRITE_ONCE()
authorPeter Zijlstra <peterz@infradead.org>
Thu, 26 Nov 2020 16:40:12 +0000 (17:40 +0100)
committerDave Hansen <dave.hansen@linux.intel.com>
Thu, 15 Dec 2022 18:37:27 +0000 (10:37 -0800)
Disallow write-tearing, that would be really unfortunate.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20221022114425.038102604%40infradead.org
arch/x86/include/asm/pgtable-3level.h

index 0a1b81d..d3a2492 100644 (file)
@@ -27,9 +27,9 @@
  */
 static inline void native_set_pte(pte_t *ptep, pte_t pte)
 {
-       ptep->pte_high = pte.pte_high;
+       WRITE_ONCE(ptep->pte_high, pte.pte_high);
        smp_wmb();
-       ptep->pte_low = pte.pte_low;
+       WRITE_ONCE(ptep->pte_low, pte.pte_low);
 }
 
 static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
@@ -58,16 +58,16 @@ static inline void native_set_pud(pud_t *pudp, pud_t pud)
 static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr,
                                    pte_t *ptep)
 {
-       ptep->pte_low = 0;
+       WRITE_ONCE(ptep->pte_low, 0);
        smp_wmb();
-       ptep->pte_high = 0;
+       WRITE_ONCE(ptep->pte_high, 0);
 }
 
 static inline void native_pmd_clear(pmd_t *pmdp)
 {
-       pmdp->pmd_low = 0;
+       WRITE_ONCE(pmdp->pmd_low, 0);
        smp_wmb();
-       pmdp->pmd_high = 0;
+       WRITE_ONCE(pmdp->pmd_high, 0);
 }
 
 static inline void native_pud_clear(pud_t *pudp)