arm64: dts: qcom: qrb4210-rb2: Enable display out

The RB2 has a HDMI output via an LT9611UXC bridge. Set it up.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-and-Tested-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230515-topic-rb2-bits-v1-2-a52d154a639d@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
index 0fc99d3..fc0e05c 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
+++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
@@ -19,6 +19,17 @@
                stdout-path = "serial0:115200n8";
        };
 
+       hdmi-connector {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con: endpoint {
+                               remote-endpoint = <&lt9611_out>;
+                       };
+               };
+       };
+
        vreg_hdmi_out_1p2: regulator-hdmi-out-1p2 {
                compatible = "regulator-fixed";
                regulator-name = "VREG_HDMI_OUT_1P2";
@@ -105,6 +116,68 @@
        };
 };
 
+&gpi_dma0 {
+       status = "okay";
+};
+
+&i2c2 {
+       clock-frequency = <400000>;
+       status = "okay";
+
+       lt9611_codec: hdmi-bridge@2b {
+               compatible = "lontium,lt9611uxc";
+               reg = <0x2b>;
+               interrupts-extended = <&tlmm 46 IRQ_TYPE_EDGE_FALLING>;
+               reset-gpios = <&tlmm 41 GPIO_ACTIVE_HIGH>;
+
+               vdd-supply = <&vreg_hdmi_out_1p2>;
+               vcc-supply = <&lt9611_3v3>;
+
+               pinctrl-0 = <&lt9611_irq_pin &lt9611_rst_pin>;
+               pinctrl-names = "default";
+               #sound-dai-cells = <1>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               lt9611_a: endpoint {
+                                       remote-endpoint = <&mdss_dsi0_out>;
+                               };
+                       };
+
+                       port@2 {
+                               reg = <2>;
+
+                               lt9611_out: endpoint {
+                                       remote-endpoint = <&hdmi_con>;
+                               };
+                       };
+               };
+       };
+};
+
+&mdss {
+       status = "okay";
+};
+
+&mdss_dsi0 {
+       vdda-supply = <&vreg_l18a_1p232>;
+       status = "okay";
+};
+
+&mdss_dsi0_out {
+       remote-endpoint = <&lt9611_a>;
+       data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi0_phy {
+       status = "okay";
+};
+
 &qupv3_id_0 {
        status = "okay";
 };
@@ -287,10 +360,23 @@
 };
 
 &tlmm {
-       gpio-reserved-ranges = <37 5>, <43 2>, <47 1>,
+       gpio-reserved-ranges = <43 2>, <47 1>,
                               <49 1>, <52 1>, <54 1>,
                               <56 3>, <61 2>, <64 1>,
                               <68 1>, <72 8>, <96 1>;
+
+       lt9611_rst_pin: lt9611-rst-state {
+               pins = "gpio41";
+               function = "gpio";
+               input-disable;
+               output-high;
+       };
+
+       lt9611_irq_pin: lt9611-irq-state {
+               pins = "gpio46";
+               function = "gpio";
+               bias-disable;
+       };
 };
 
 &uart4 {