#endif
spin_lock_init(&dev_priv->ospm_lock);
+
+ /* Runtime PM for PCI drivers. */
+ pm_runtime_put_noidle(&dev->pdev->dev);
}
/*
*/
void ospm_power_uninit(struct drm_device *drm_dev)
{
- mutex_destroy(&g_ospm_mutex);
- pm_runtime_forbid(&drm_dev->pdev->dev);
+ /* Runtime PM for PCI drivers. */
pm_runtime_get_noresume(&drm_dev->pdev->dev);
+
+ mutex_destroy(&g_ospm_mutex);
}
IMG_UINT32 deviceID = 0;
bool force_on = usage ? true : false;
-#ifdef CONFIG_PM_RUNTIME
- /* increment pm_runtime_refcount */
pm_runtime_get(&drm_dev->pdev->dev);
-#endif
/*quick path, not 100% race safe, but should be enough comapre to current other code in this file */
if (!force_on) {
if (hw_island & (OSPM_ALL_ISLANDS & ~g_hw_power_status_mask)) {
-#ifdef CONFIG_PM_RUNTIME
- /* decrement pm_runtime_refcount */
pm_runtime_put(&drm_dev->pdev->dev);
-#endif
return false;
} else {
locked = false;
break;
}
} else {
-#ifdef CONFIG_PM_RUNTIME
- /* decrement pm_runtime_refcount */
pm_runtime_put(&drm_dev->pdev->dev);
-#endif
}
if (!b_atomic && locked)
break;
}
- //decrement runtime pm ref count
pm_runtime_put(&drm_dev->pdev->dev);
WARN_ON(atomic_read(&g_graphics_access_count) < 0);
if (dev_priv->had_pvt_data)
dev_priv->had_interface->resume(dev_priv->had_pvt_data);
#endif
- /*Nop for GFX*/
+
+ ospm_power_resume(dev);
+
return 0;
}