Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

Pull x86 platform updates from Ingo Molnar:
 "Two changes:

   - implement various VMWare guest OS improvements/fixes (Alexey
     Makhalov)

   - unexport a spurious export from the intel-mid platform driver
     (Lukas Wunner)"

* 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/vmware: Add paravirt sched clock
  x86/vmware: Add basic paravirt ops support
  x86/vmware: Use tsc_khz value for calibrate_cpu()
  x86/platform/intel-mid: Unexport intel_mid_pci_set_power_state()
  x86/vmware: Read tsc_khz only once at boot time

diff --cc Documentation/kernel-parameters.txt
Simple merge

diff --cc arch/x86/kernel/cpu/vmware.c
index 5130985,cdbe38b..891f4da
--- 1/arch/x86/kernel/cpu/vmware.c
--- 2/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@@ -27,8 -28,11 +28,12 @@@
  #include <asm/div64.h>
  #include <asm/x86_init.h>
  #include <asm/hypervisor.h>
 +#include <asm/timer.h>
  #include <asm/apic.h>
+ #include <asm/timer.h>
+ 
+ #undef pr_fmt
+ #define pr_fmt(fmt)   "vmware: " fmt
  
  #define CPUID_VMWARE_INFO_LEAF        0x40000000
  #define VMWARE_HYPERVISOR_MAGIC       0x564D5868
@@@ -96,9 -147,7 +148,11 @@@ static void __init vmware_platform_setu
                pr_warn("Failed to get TSC freq from the hypervisor\n");
        }
  
+       vmware_paravirt_ops_setup();
++
 +#ifdef CONFIG_X86_IO_APIC
 +      no_timer_check = 1;
 +#endif
  }
  
  /*

diff --cc arch/x86/platform/intel-mid/pwr.c
index 67375dd,59628e4..ef03852
--- 1/arch/x86/platform/intel-mid/pwr.c
--- 2/arch/x86/platform/intel-mid/pwr.c
+++ b/arch/x86/platform/intel-mid/pwr.c
@@@ -270,27 -270,7 +270,26 @@@ int intel_mid_pci_set_power_state(struc
  
        return 0;
  }
- EXPORT_SYMBOL_GPL(intel_mid_pci_set_power_state);
  
 +pci_power_t intel_mid_pci_get_power_state(struct pci_dev *pdev)
 +{
 +      struct mid_pwr *pwr = midpwr;
 +      int id, reg, bit;
 +      u32 power;
 +
 +      if (!pwr || !pwr->available)
 +              return PCI_UNKNOWN;
 +
 +      id = intel_mid_pwr_get_lss_id(pdev);
 +      if (id < 0)
 +              return PCI_UNKNOWN;
 +
 +      reg = (id * LSS_PWS_BITS) / 32;
 +      bit = (id * LSS_PWS_BITS) % 32;
 +      power = mid_pwr_get_state(pwr, reg);
 +      return (__force pci_power_t)((power >> bit) & 3);
 +}
 +
  void intel_mid_pwr_power_off(void)
  {
        struct mid_pwr *pwr = midpwr;