Media:wave5: Driver get clks from DTS instead of hard coding.

Signed-off-by: Som Qin <som.qin@starfivetech.com>
[sw0312.kim: cherry-pick the commit 167fdf2d4c34 from https://github.com/starfive-tech/linux/tree/JH7110_VisionFive2_6.1.y_devel]
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Change-Id: I31ecc8cb300d21ab95c231d14875dcac93e337a6

diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpu.c b/drivers/media/platform/chips-media/wave5/wave5-vpu.c
index 176bbe703b0915e4bb0d8d9ac744fc75d16680ae..e378817f57a8b93b315da3e568c2b7e12a6f1724 100644 (file)
--- a/drivers/media/platform/chips-media/wave5/wave5-vpu.c
+++ b/drivers/media/platform/chips-media/wave5/wave5-vpu.c
@@ -25,40 +25,11 @@
 #define WAVE5_IS_ENC BIT(0)
 #define WAVE5_IS_DEC BIT(1)
 
-struct clk_bulk_data vpu_clks[] = {
-               { .id = "apb_clk" },
-               { .id = "axi_clk" },
-               { .id = "bpu_clk" },
-               { .id = "vce_clk" },
-               { .id = "noc_bus" },
-};
-
 struct wave5_match_data {
        int flags;
        const char *fw_name;
 };
 
-static int vpu_clk_get(struct platform_device *pdev, struct vpu_device *vpu)
-{
-       struct device *dev = &pdev->dev;
-       int ret;
-
-       vpu->clks = vpu_clks;
-       vpu->num_clks = ARRAY_SIZE(vpu_clks);
-
-       vpu->resets = devm_reset_control_array_get_exclusive(dev);
-       if (IS_ERR(vpu->resets)) {
-               ret = PTR_ERR(vpu->resets);
-               dev_err(dev, "faied to get vpu reset controls\n");
-       }
-
-       ret = devm_clk_bulk_get(dev, vpu->num_clks, vpu->clks);
-       if (ret)
-               dev_err(dev, "faied to get vpu clk controls\n");
-
-       return 0;
-}
-
 int wave5_vpu_wait_interrupt(struct vpu_instance *inst, unsigned int timeout)
 {
        int ret;
@@ -229,13 +200,20 @@ static int wave5_vpu_probe(struct platform_device *pdev)
        dev_set_drvdata(&pdev->dev, dev);
        dev->dev = &pdev->dev;
 
-       ret = vpu_clk_get(pdev, dev);
+       ret = devm_clk_bulk_get_all(&pdev->dev, &dev->clks);
 
        /* continue without clock, assume externally managed */
        if (ret < 0) {
                dev_err(&pdev->dev, "Getting clocks, fail: %d\n", ret);
                return ret;
        }
+       dev->num_clks = ret;
+
+       dev->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
+       if (IS_ERR(dev->resets)) {
+               dev_err(&pdev->dev, "faied to get vpu reset controls\n");
+               return -ENODEV;
+       }
 
        dev->sram_buf.daddr = VDI_SRAM_BASE_ADDR;
        dev->sram_buf.size = VDI_WAVE511_SRAM_SIZE;