serial: 8250: Dissociate 4MHz Titan ports from Oxford ports

Oxford Semiconductor PCIe (Tornado) serial port devices have their baud
base set incorrectly, however their `pciserial_board' entries have been
reused for Titan serial port devices.  Define own entries for the latter
devices then, carrying over the settings, so that Oxford entries can be
fixed.

Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Link: https://lore.kernel.org/r/alpine.DEB.2.21.2106100142310.5469@angie.orcam.me.uk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 780cc99..f4134e7 100644 (file)
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -2972,6 +2972,10 @@ enum pci_board_num_t {
        pbn_sunix_pci_4s,
        pbn_sunix_pci_8s,
        pbn_sunix_pci_16s,
+       pbn_titan_1_4000000,
+       pbn_titan_2_4000000,
+       pbn_titan_4_4000000,
+       pbn_titan_8_4000000,
        pbn_moxa8250_2p,
        pbn_moxa8250_4p,
        pbn_moxa8250_8p,
@@ -3759,6 +3763,34 @@ static struct pciserial_board pci_boards[] = {
                .base_baud      = 921600,
                .uart_offset    = 0x8,
        },
+       [pbn_titan_1_4000000] = {
+               .flags          = FL_BASE0,
+               .num_ports      = 1,
+               .base_baud      = 4000000,
+               .uart_offset    = 0x200,
+               .first_offset   = 0x1000,
+       },
+       [pbn_titan_2_4000000] = {
+               .flags          = FL_BASE0,
+               .num_ports      = 2,
+               .base_baud      = 4000000,
+               .uart_offset    = 0x200,
+               .first_offset   = 0x1000,
+       },
+       [pbn_titan_4_4000000] = {
+               .flags          = FL_BASE0,
+               .num_ports      = 4,
+               .base_baud      = 4000000,
+               .uart_offset    = 0x200,
+               .first_offset   = 0x1000,
+       },
+       [pbn_titan_8_4000000] = {
+               .flags          = FL_BASE0,
+               .num_ports      = 8,
+               .base_baud      = 4000000,
+               .uart_offset    = 0x200,
+               .first_offset   = 0x1000,
+       },
        [pbn_moxa8250_2p] = {
                .flags          = FL_BASE1,
                .num_ports      = 2,
@@ -4703,22 +4735,22 @@ static const struct pci_device_id serial_pci_tbl[] = {
                pbn_b0_4_921600 },
        {       PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_100E,
                PCI_ANY_ID, PCI_ANY_ID, 0, 0,
-               pbn_oxsemi_1_4000000 },
+               pbn_titan_1_4000000 },
        {       PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_200E,
                PCI_ANY_ID, PCI_ANY_ID, 0, 0,
-               pbn_oxsemi_2_4000000 },
+               pbn_titan_2_4000000 },
        {       PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_400E,
                PCI_ANY_ID, PCI_ANY_ID, 0, 0,
-               pbn_oxsemi_4_4000000 },
+               pbn_titan_4_4000000 },
        {       PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_800E,
                PCI_ANY_ID, PCI_ANY_ID, 0, 0,
-               pbn_oxsemi_8_4000000 },
+               pbn_titan_8_4000000 },
        {       PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_200EI,
                PCI_ANY_ID, PCI_ANY_ID, 0, 0,
-               pbn_oxsemi_2_4000000 },
+               pbn_titan_2_4000000 },
        {       PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_200EISI,
                PCI_ANY_ID, PCI_ANY_ID, 0, 0,
-               pbn_oxsemi_2_4000000 },
+               pbn_titan_2_4000000 },
        {       PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_200V3,
                PCI_ANY_ID, PCI_ANY_ID, 0, 0,
                pbn_b0_bt_2_921600 },