perf/x86/uncore: Add new Alder Lake and Raptor Lake support

From the perspective of the uncore PMU, there is nothing changed for the
new Alder Lake N and Raptor Lake P.

Add new PCIIDs of IMC.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220504194413.1003071-5-kan.liang@linux.intel.com

diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
index 7695dca..db6c31b 100644 (file)
--- a/arch/x86/events/intel/uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -1828,7 +1828,9 @@ static const struct x86_cpu_id intel_uncore_match[] __initconst = {
        X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE,          &rkl_uncore_init),
        X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,           &adl_uncore_init),
        X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,         &adl_uncore_init),
+       X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,         &adl_uncore_init),
        X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,          &adl_uncore_init),
+       X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,        &adl_uncore_init),
        X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X,    &spr_uncore_init),
        X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,      &snr_uncore_init),
        {},

diff --git a/arch/x86/events/intel/uncore_snb.c b/arch/x86/events/intel/uncore_snb.c
index b30890b..ce44001 100644 (file)
--- a/arch/x86/events/intel/uncore_snb.c
+++ b/arch/x86/events/intel/uncore_snb.c
@@ -79,10 +79,36 @@
 #define PCI_DEVICE_ID_INTEL_ADL_14_IMC         0x4650
 #define PCI_DEVICE_ID_INTEL_ADL_15_IMC         0x4668
 #define PCI_DEVICE_ID_INTEL_ADL_16_IMC         0x4670
+#define PCI_DEVICE_ID_INTEL_ADL_17_IMC         0x4614
+#define PCI_DEVICE_ID_INTEL_ADL_18_IMC         0x4617
+#define PCI_DEVICE_ID_INTEL_ADL_19_IMC         0x4618
+#define PCI_DEVICE_ID_INTEL_ADL_20_IMC         0x461B
+#define PCI_DEVICE_ID_INTEL_ADL_21_IMC         0x461C
 #define PCI_DEVICE_ID_INTEL_RPL_1_IMC          0xA700
 #define PCI_DEVICE_ID_INTEL_RPL_2_IMC          0xA702
 #define PCI_DEVICE_ID_INTEL_RPL_3_IMC          0xA706
 #define PCI_DEVICE_ID_INTEL_RPL_4_IMC          0xA709
+#define PCI_DEVICE_ID_INTEL_RPL_5_IMC          0xA701
+#define PCI_DEVICE_ID_INTEL_RPL_6_IMC          0xA703
+#define PCI_DEVICE_ID_INTEL_RPL_7_IMC          0xA704
+#define PCI_DEVICE_ID_INTEL_RPL_8_IMC          0xA705
+#define PCI_DEVICE_ID_INTEL_RPL_9_IMC          0xA706
+#define PCI_DEVICE_ID_INTEL_RPL_10_IMC         0xA707
+#define PCI_DEVICE_ID_INTEL_RPL_11_IMC         0xA708
+#define PCI_DEVICE_ID_INTEL_RPL_12_IMC         0xA709
+#define PCI_DEVICE_ID_INTEL_RPL_13_IMC         0xA70a
+#define PCI_DEVICE_ID_INTEL_RPL_14_IMC         0xA70b
+#define PCI_DEVICE_ID_INTEL_RPL_15_IMC         0xA715
+#define PCI_DEVICE_ID_INTEL_RPL_16_IMC         0xA716
+#define PCI_DEVICE_ID_INTEL_RPL_17_IMC         0xA717
+#define PCI_DEVICE_ID_INTEL_RPL_18_IMC         0xA718
+#define PCI_DEVICE_ID_INTEL_RPL_19_IMC         0xA719
+#define PCI_DEVICE_ID_INTEL_RPL_20_IMC         0xA71A
+#define PCI_DEVICE_ID_INTEL_RPL_21_IMC         0xA71B
+#define PCI_DEVICE_ID_INTEL_RPL_22_IMC         0xA71C
+#define PCI_DEVICE_ID_INTEL_RPL_23_IMC         0xA728
+#define PCI_DEVICE_ID_INTEL_RPL_24_IMC         0xA729
+#define PCI_DEVICE_ID_INTEL_RPL_25_IMC         0xA72A
 
 
 #define IMC_UNCORE_DEV(a)                                              \
@@ -1192,10 +1218,36 @@ static const struct pci_device_id tgl_uncore_pci_ids[] = {
        IMC_UNCORE_DEV(ADL_14),
        IMC_UNCORE_DEV(ADL_15),
        IMC_UNCORE_DEV(ADL_16),
+       IMC_UNCORE_DEV(ADL_17),
+       IMC_UNCORE_DEV(ADL_18),
+       IMC_UNCORE_DEV(ADL_19),
+       IMC_UNCORE_DEV(ADL_20),
+       IMC_UNCORE_DEV(ADL_21),
        IMC_UNCORE_DEV(RPL_1),
        IMC_UNCORE_DEV(RPL_2),
        IMC_UNCORE_DEV(RPL_3),
        IMC_UNCORE_DEV(RPL_4),
+       IMC_UNCORE_DEV(RPL_5),
+       IMC_UNCORE_DEV(RPL_6),
+       IMC_UNCORE_DEV(RPL_7),
+       IMC_UNCORE_DEV(RPL_8),
+       IMC_UNCORE_DEV(RPL_9),
+       IMC_UNCORE_DEV(RPL_10),
+       IMC_UNCORE_DEV(RPL_11),
+       IMC_UNCORE_DEV(RPL_12),
+       IMC_UNCORE_DEV(RPL_13),
+       IMC_UNCORE_DEV(RPL_14),
+       IMC_UNCORE_DEV(RPL_15),
+       IMC_UNCORE_DEV(RPL_16),
+       IMC_UNCORE_DEV(RPL_17),
+       IMC_UNCORE_DEV(RPL_18),
+       IMC_UNCORE_DEV(RPL_19),
+       IMC_UNCORE_DEV(RPL_20),
+       IMC_UNCORE_DEV(RPL_21),
+       IMC_UNCORE_DEV(RPL_22),
+       IMC_UNCORE_DEV(RPL_23),
+       IMC_UNCORE_DEV(RPL_24),
+       IMC_UNCORE_DEV(RPL_25),
        { /* end: all zeroes */ }
 };