* config/fr30/fr30.h: Fix comment typos.

	* config/frv/frv.c: Likewise.
	* config/i386/xmmintrin.h: Likewise.
	* config/mips/mips.c: Likewise.
	* config/sh/sh.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@57144 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cbbacfb..57a8aa4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,13 @@
 2002-09-14  Kazu Hirata  <kazu@cs.umass.edu>
 
+       * config/fr30/fr30.h: Fix comment typos.
+       * config/frv/frv.c: Likewise.
+       * config/i386/xmmintrin.h: Likewise.
+       * config/mips/mips.c: Likewise.
+       * config/sh/sh.c: Likewise.
+
+2002-09-14  Kazu Hirata  <kazu@cs.umass.edu>
+
        * haifa-sched.c: Follow spelling conventions.
        * regclass.c: Likewise.
        * regrename.c: Likewise.

diff --git a/gcc/config/fr30/fr30.h b/gcc/config/fr30/fr30.h
index a2950c8..da65aae 100644 (file)
--- a/gcc/config/fr30/fr30.h
+++ b/gcc/config/fr30/fr30.h
@@ -992,7 +992,7 @@ do                                                                          \
    
    * indexed addressing using small signed offsets from the frame pointer
 
-   * register plus register addresing using R13 as the base register.
+   * register plus register addressing using R13 as the base register.
 
    At the moment we only support the first two of these special cases.  */
    

diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c
index 4ef94e4..0fcf53e 100644 (file)
--- a/gcc/config/frv/frv.c
+++ b/gcc/config/frv/frv.c
@@ -3552,7 +3552,7 @@ frv_legitimize_address (x, oldx, mode)
 {
   rtx ret = NULL_RTX;
 
-  /* Don't try to legitimize addreses if we are not optimizing, since the
+  /* Don't try to legitimize addresses if we are not optimizing, since the
      address we generate is not a general operand, and will horribly mess
      things up when force_reg is called to try and put it in a register because
      we aren't optimizing.  */

diff --git a/gcc/config/i386/xmmintrin.h b/gcc/config/i386/xmmintrin.h
index 09eea22..9442e96 100644 (file)
--- a/gcc/config/i386/xmmintrin.h
+++ b/gcc/config/i386/xmmintrin.h
@@ -871,7 +871,7 @@ _mm_storeu_ps (float *__P, __m128 __A)
   __builtin_ia32_storeups (__P, (__v4sf)__A);
 }
 
-/* Store four SPFP values in reverse order.  The addres must be aligned.  */
+/* Store four SPFP values in reverse order.  The address must be aligned.  */
 static __inline void
 _mm_storer_ps (float *__P, __m128 __A)
 {

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 2044cbf..192c60b 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -8092,7 +8092,7 @@ mips_select_section (decl, reloc, align)
    precisely correct.
 
    When not mips16 code nor embedded PIC, if a symbol is in a
-   gp addresable section, SYMBOL_REF_FLAG is set prevent gcc from
+   gp addressable section, SYMBOL_REF_FLAG is set prevent gcc from
    splitting the reference so that gas can generate a gp relative
    reference.
 

diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index 5921390..3dd1106 100644 (file)
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -3862,7 +3862,7 @@ machine_dependent_reorg (first)
   split_branches (first);
 
   /* The INSN_REFERENCES_ARE_DELAYED in sh.h is problematic because it
-     also has an effect on the register that holds the addres of the sfunc.
+     also has an effect on the register that holds the address of the sfunc.
      Insert an extra dummy insn in front of each sfunc that pretends to
      use this register.  */
   if (flag_delayed_branch)