KVM: selftests: Convert tsc_msrs_test away from VCPU_ID

Convert tsc_msrs_test to use vm_create_with_one_vcpu() and pass around a
'struct kvm_vcpu' object instead of using a global VCPU_ID.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/tools/testing/selftests/kvm/x86_64/tsc_msrs_test.c b/tools/testing/selftests/kvm/x86_64/tsc_msrs_test.c
index a426078..3b7bf66 100644 (file)
--- a/tools/testing/selftests/kvm/x86_64/tsc_msrs_test.c
+++ b/tools/testing/selftests/kvm/x86_64/tsc_msrs_test.c
@@ -9,14 +9,12 @@
 #include "kvm_util.h"
 #include "processor.h"
 
-#define VCPU_ID 0
-
 #define UNITY                  (1ull << 30)
 #define HOST_ADJUST            (UNITY * 64)
 #define GUEST_STEP             (UNITY * 4)
 #define ROUND(x)               ((x + UNITY / 2) & -UNITY)
 #define rounded_rdmsr(x)       ROUND(rdmsr(x))
-#define rounded_host_rdmsr(x)  ROUND(vcpu_get_msr(vm, 0, x))
+#define rounded_host_rdmsr(x)  ROUND(vcpu_get_msr(vm, vcpu->id, x))
 
 static void guest_code(void)
 {
@@ -66,15 +64,13 @@ static void guest_code(void)
        GUEST_DONE();
 }
 
-static void run_vcpu(struct kvm_vm *vm, uint32_t vcpuid, int stage)
+static void run_vcpu(struct kvm_vcpu *vcpu, int stage)
 {
        struct ucall uc;
 
-       vcpu_args_set(vm, vcpuid, 1, vcpuid);
-
-       vcpu_ioctl(vm, vcpuid, KVM_RUN, NULL);
+       vcpu_run(vcpu->vm, vcpu->id);
 
-       switch (get_ucall(vm, vcpuid, &uc)) {
+       switch (get_ucall(vcpu->vm, vcpu->id, &uc)) {
        case UCALL_SYNC:
                TEST_ASSERT(!strcmp((const char *)uc.args[0], "hello") &&
                            uc.args[1] == stage + 1, "Stage %d: Unexpected register values vmexit, got %lx",
@@ -88,29 +84,30 @@ static void run_vcpu(struct kvm_vm *vm, uint32_t vcpuid, int stage)
                            __FILE__, uc.args[1], uc.args[2], uc.args[3]);
        default:
                TEST_ASSERT(false, "Unexpected exit: %s",
-                           exit_reason_str(vcpu_state(vm, vcpuid)->exit_reason));
+                           exit_reason_str(vcpu->run->exit_reason));
        }
 }
 
 int main(void)
 {
+       struct kvm_vcpu *vcpu;
        struct kvm_vm *vm;
        uint64_t val;
 
-       vm = vm_create_default(VCPU_ID, 0, guest_code);
+       vm = vm_create_with_one_vcpu(&vcpu, guest_code);
 
        val = 0;
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC), val);
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC_ADJUST), val);
 
        /* Guest: writes to MSR_IA32_TSC affect both MSRs.  */
-       run_vcpu(vm, VCPU_ID, 1);
+       run_vcpu(vcpu, 1);
        val = 1ull * GUEST_STEP;
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC), val);
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC_ADJUST), val);
 
        /* Guest: writes to MSR_IA32_TSC_ADJUST affect both MSRs.  */
-       run_vcpu(vm, VCPU_ID, 2);
+       run_vcpu(vcpu, 2);
        val = 2ull * GUEST_STEP;
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC), val);
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC_ADJUST), val);
@@ -119,18 +116,18 @@ int main(void)
         * Host: writes to MSR_IA32_TSC set the host-side offset
         * and therefore do not change MSR_IA32_TSC_ADJUST.
         */
-       vcpu_set_msr(vm, 0, MSR_IA32_TSC, HOST_ADJUST + val);
+       vcpu_set_msr(vm, vcpu->id, MSR_IA32_TSC, HOST_ADJUST + val);
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC), HOST_ADJUST + val);
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC_ADJUST), val);
-       run_vcpu(vm, VCPU_ID, 3);
+       run_vcpu(vcpu, 3);
 
        /* Host: writes to MSR_IA32_TSC_ADJUST do not modify the TSC.  */
-       vcpu_set_msr(vm, 0, MSR_IA32_TSC_ADJUST, UNITY * 123456);
+       vcpu_set_msr(vm, vcpu->id, MSR_IA32_TSC_ADJUST, UNITY * 123456);
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC), HOST_ADJUST + val);
-       ASSERT_EQ(vcpu_get_msr(vm, 0, MSR_IA32_TSC_ADJUST), UNITY * 123456);
+       ASSERT_EQ(vcpu_get_msr(vm, vcpu->id, MSR_IA32_TSC_ADJUST), UNITY * 123456);
 
        /* Restore previous value.  */
-       vcpu_set_msr(vm, 0, MSR_IA32_TSC_ADJUST, val);
+       vcpu_set_msr(vm, vcpu->id, MSR_IA32_TSC_ADJUST, val);
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC), HOST_ADJUST + val);
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC_ADJUST), val);
 
@@ -138,7 +135,7 @@ int main(void)
         * Guest: writes to MSR_IA32_TSC_ADJUST do not destroy the
         * host-side offset and affect both MSRs.
         */
-       run_vcpu(vm, VCPU_ID, 4);
+       run_vcpu(vcpu, 4);
        val = 3ull * GUEST_STEP;
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC), HOST_ADJUST + val);
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC_ADJUST), val);
@@ -147,7 +144,7 @@ int main(void)
         * Guest: writes to MSR_IA32_TSC affect both MSRs, so the host-side
         * offset is now visible in MSR_IA32_TSC_ADJUST.
         */
-       run_vcpu(vm, VCPU_ID, 5);
+       run_vcpu(vcpu, 5);
        val = 4ull * GUEST_STEP;
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC), val);
        ASSERT_EQ(rounded_host_rdmsr(MSR_IA32_TSC_ADJUST), val - HOST_ADJUST);