+2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
+
+ * Makefile.am: Regenerate dependencies.
+ * Makefile.in: Regenerate.
+ * archures.c: Add bfd_mach_sh3_nommu .
+ * bfd-in2.h: Regenerate.
+ * cpu-sh.c: Add sh3-nommu architecture.
+ (bfd_to_arch_table): Create new table.
+ (sh_get_arch_from_bfd_mach): Create new function.
+ (sh_get_arch_up_from_bfd_mach): Create new function.
+ (sh_merge_bfd_arch): Create new function.
+ * elf32-sh.c (sh_ef_bfd_table): Add table.
+ (sh_elf_check_relocs): Replace switch statement with
+ use of sh_ef_bfd_table .
+ (sh_elf_get_flags_from_mach): Add new function.
+ (sh_find_elf_flags): Likewise.
+ (sh_elf_copy_private_data): Replace most of non-elf contents
+ with a call to sh_merge_bfd_arch() .
+
2004-05-27 Michael Chastain <mec.gnu@mindspring.com>
* Makefile.am (bfdver.h): Use explicit filename, not $< .
cpu-arc.lo: cpu-arc.c $(INCDIR)/filenames.h
cpu-arm.lo: cpu-arm.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h
cpu-avr.lo: cpu-avr.c $(INCDIR)/filenames.h
-cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h
cpu-cris.lo: cpu-cris.c $(INCDIR)/filenames.h
+cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h
cpu-d10v.lo: cpu-d10v.c $(INCDIR)/filenames.h
cpu-d30v.lo: cpu-d30v.c $(INCDIR)/filenames.h
cpu-dlx.lo: cpu-dlx.c $(INCDIR)/filenames.h
cpu-powerpc.lo: cpu-powerpc.c $(INCDIR)/filenames.h
cpu-rs6000.lo: cpu-rs6000.c $(INCDIR)/filenames.h
cpu-s390.lo: cpu-s390.c $(INCDIR)/filenames.h
-cpu-sh.lo: cpu-sh.c $(INCDIR)/filenames.h
+cpu-sh.lo: cpu-sh.c $(INCDIR)/filenames.h $(srcdir)/../opcodes/sh-opc.h
cpu-sparc.lo: cpu-sparc.c $(INCDIR)/filenames.h
cpu-tic30.lo: cpu-tic30.c $(INCDIR)/filenames.h
cpu-tic4x.lo: cpu-tic4x.c $(INCDIR)/filenames.h
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/avr.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
-elf32-cr16c.lo: elf32-cr16c.c $(INCDIR)/filenames.h elf-bfd.h \
- $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+elf32-cr16c.lo: elf32-cr16c.c $(INCDIR)/filenames.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cr16c.h $(INCDIR)/elf/reloc-macros.h \
- elf32-target.h
+ elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h elf32-target.h
elf32-cris.lo: elf32-cris.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/../opcodes/sh64-opc.h \
elf32-sh64.h elf32-sh.c $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
- elf32-target.h
+ $(INCDIR)/libiberty.h elf32-target.h
elf32-sh64-com.lo: elf32-sh64-com.c $(INCDIR)/filenames.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/sh.h \
elf32-sh.lo: elf32-sh.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
- elf32-target.h
+ $(INCDIR)/libiberty.h elf32-target.h
elf32-sparc.lo: elf32-sparc.c $(INCDIR)/filenames.h \
$(INCDIR)/bfdlink.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/sparc.h \
$(INCDIR)/xtensa-config.h elf32-target.h
elf32.lo: elf32.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/bfdlink.h elf-bfd.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h \
- $(INCDIR)/safe-ctype.h
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h
elflink.lo: elflink.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
- $(INCDIR)/elf/external.h $(INCDIR)/libiberty.h
+ $(INCDIR)/elf/external.h $(INCDIR)/safe-ctype.h $(INCDIR)/libiberty.h
elf-strtab.lo: elf-strtab.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h $(INCDIR)/libiberty.h
xsym.lo: xsym.c xsym.h $(INCDIR)/filenames.h
xtensa-isa.lo: xtensa-isa.c $(INCDIR)/xtensa-isa.h \
$(INCDIR)/xtensa-isa-internal.h
-xtensa-modules.lo: xtensa-modules.c $(INCDIR)/xtensa-isa.h \
- $(INCDIR)/xtensa-isa-internal.h
+xtensa-modules.lo: xtensa-modules.c $(INCDIR)/xtensa-isa-internal.h
aix5ppc-core.lo: aix5ppc-core.c
aout64.lo: aout64.c aoutx.h $(INCDIR)/filenames.h $(INCDIR)/safe-ctype.h \
$(INCDIR)/bfdlink.h libaout.h $(INCDIR)/aout/aout64.h \
elf64-target.h
elf64.lo: elf64.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/bfdlink.h elf-bfd.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h \
- $(INCDIR)/safe-ctype.h
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h
mmo.lo: mmo.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/elf/mmix.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/mmix.h
nlm32-alpha.lo: nlm32-alpha.c $(INCDIR)/filenames.h \
cpu-arc.lo: cpu-arc.c $(INCDIR)/filenames.h
cpu-arm.lo: cpu-arm.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h
cpu-avr.lo: cpu-avr.c $(INCDIR)/filenames.h
-cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h
cpu-cris.lo: cpu-cris.c $(INCDIR)/filenames.h
+cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h
cpu-d10v.lo: cpu-d10v.c $(INCDIR)/filenames.h
cpu-d30v.lo: cpu-d30v.c $(INCDIR)/filenames.h
cpu-dlx.lo: cpu-dlx.c $(INCDIR)/filenames.h
cpu-powerpc.lo: cpu-powerpc.c $(INCDIR)/filenames.h
cpu-rs6000.lo: cpu-rs6000.c $(INCDIR)/filenames.h
cpu-s390.lo: cpu-s390.c $(INCDIR)/filenames.h
-cpu-sh.lo: cpu-sh.c $(INCDIR)/filenames.h
+cpu-sh.lo: cpu-sh.c $(INCDIR)/filenames.h $(srcdir)/../opcodes/sh-opc.h
cpu-sparc.lo: cpu-sparc.c $(INCDIR)/filenames.h
cpu-tic30.lo: cpu-tic30.c $(INCDIR)/filenames.h
cpu-tic4x.lo: cpu-tic4x.c $(INCDIR)/filenames.h
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/avr.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
-elf32-cr16c.lo: elf32-cr16c.c $(INCDIR)/filenames.h elf-bfd.h \
- $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+elf32-cr16c.lo: elf32-cr16c.c $(INCDIR)/filenames.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cr16c.h $(INCDIR)/elf/reloc-macros.h \
- elf32-target.h
+ elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h elf32-target.h
elf32-cris.lo: elf32-cris.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/../opcodes/sh64-opc.h \
elf32-sh64.h elf32-sh.c $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
- elf32-target.h
+ $(INCDIR)/libiberty.h elf32-target.h
elf32-sh64-com.lo: elf32-sh64-com.c $(INCDIR)/filenames.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/sh.h \
elf32-sh.lo: elf32-sh.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/external.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
- elf32-target.h
+ $(INCDIR)/libiberty.h elf32-target.h
elf32-sparc.lo: elf32-sparc.c $(INCDIR)/filenames.h \
$(INCDIR)/bfdlink.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/elf/sparc.h \
$(INCDIR)/xtensa-config.h elf32-target.h
elf32.lo: elf32.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/bfdlink.h elf-bfd.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h \
- $(INCDIR)/safe-ctype.h
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h
elflink.lo: elflink.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
- $(INCDIR)/elf/external.h $(INCDIR)/libiberty.h
+ $(INCDIR)/elf/external.h $(INCDIR)/safe-ctype.h $(INCDIR)/libiberty.h
elf-strtab.lo: elf-strtab.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/hashtab.h $(INCDIR)/libiberty.h
xsym.lo: xsym.c xsym.h $(INCDIR)/filenames.h
xtensa-isa.lo: xtensa-isa.c $(INCDIR)/xtensa-isa.h \
$(INCDIR)/xtensa-isa-internal.h
-xtensa-modules.lo: xtensa-modules.c $(INCDIR)/xtensa-isa.h \
- $(INCDIR)/xtensa-isa-internal.h
+xtensa-modules.lo: xtensa-modules.c $(INCDIR)/xtensa-isa-internal.h
aix5ppc-core.lo: aix5ppc-core.c
aout64.lo: aout64.c aoutx.h $(INCDIR)/filenames.h $(INCDIR)/safe-ctype.h \
$(INCDIR)/bfdlink.h libaout.h $(INCDIR)/aout/aout64.h \
elf64-target.h
elf64.lo: elf64.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/bfdlink.h elf-bfd.h $(INCDIR)/elf/common.h \
- $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h \
- $(INCDIR)/safe-ctype.h
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h
mmo.lo: mmo.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/elf/mmix.h $(INCDIR)/elf/reloc-macros.h $(INCDIR)/opcode/mmix.h
nlm32-alpha.lo: nlm32-alpha.c $(INCDIR)/filenames.h \
.#define bfd_mach_sh_dsp 0x2d
.#define bfd_mach_sh2e 0x2e
.#define bfd_mach_sh3 0x30
+.#define bfd_mach_sh3_nommu 0x31
.#define bfd_mach_sh3_dsp 0x3d
.#define bfd_mach_sh3e 0x3e
.#define bfd_mach_sh4 0x40
#define bfd_mach_sh_dsp 0x2d
#define bfd_mach_sh2e 0x2e
#define bfd_mach_sh3 0x30
+#define bfd_mach_sh3_nommu 0x31
#define bfd_mach_sh3_dsp 0x3d
#define bfd_mach_sh3e 0x3e
#define bfd_mach_sh4 0x40
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
+#include "../opcodes/sh-opc.h"
#define SH_NEXT &arch_info_struct[0]
#define SH2_NEXT &arch_info_struct[1]
#define SH2E_NEXT &arch_info_struct[2]
#define SH_DSP_NEXT &arch_info_struct[3]
#define SH3_NEXT &arch_info_struct[4]
-#define SH3_DSP_NEXT &arch_info_struct[5]
-#define SH3E_NEXT &arch_info_struct[6]
-#define SH4_NEXT &arch_info_struct[7]
-#define SH4A_NEXT &arch_info_struct[8]
-#define SH4AL_DSP_NEXT &arch_info_struct[9]
-#define SH4_NOFPU_NEXT &arch_info_struct[10]
-#define SH4_NOMMU_NOFPU_NEXT &arch_info_struct[11]
-#define SH4A_NOFPU_NEXT &arch_info_struct[12]
+#define SH3_NOMMU_NEXT &arch_info_struct[5]
+#define SH3_DSP_NEXT &arch_info_struct[6]
+#define SH3E_NEXT &arch_info_struct[7]
+#define SH4_NEXT &arch_info_struct[8]
+#define SH4A_NEXT &arch_info_struct[9]
+#define SH4AL_DSP_NEXT &arch_info_struct[10]
+#define SH4_NOFPU_NEXT &arch_info_struct[11]
+#define SH4_NOMMU_NOFPU_NEXT &arch_info_struct[12]
+#define SH4A_NOFPU_NEXT &arch_info_struct[13]
#define SH64_NEXT NULL
static const bfd_arch_info_type arch_info_struct[] =
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_sh,
+ bfd_mach_sh3_nommu,
+ "sh", /* arch_name */
+ "sh3-nommu", /* printable name */
+ 1,
+ FALSE, /* not the default */
+ bfd_default_compatible,
+ bfd_default_scan,
+ SH3_NOMMU_NEXT
+ },
+ {
+ 32, /* 32 bits in a word */
+ 32, /* 32 bits in an address */
+ 8, /* 8 bits in a byte */
+ bfd_arch_sh,
bfd_mach_sh3_dsp,
"sh", /* arch_name */
"sh3-dsp", /* printable name */
bfd_default_scan,
SH_NEXT
};
+
+
+/* This table defines the mappings from the BFD internal numbering
+ system to the opcodes internal flags system.
+ It is used by the functions defined below.
+ The prototypes for these SH specific functions are found in
+ sh-opc.h . */
+
+static struct { unsigned long bfd_mach, arch, arch_up; } bfd_to_arch_table[] =
+{
+ { bfd_mach_sh, arch_sh1, arch_sh1_up },
+ { bfd_mach_sh2, arch_sh2, arch_sh2_up },
+ { bfd_mach_sh2e, arch_sh2e, arch_sh2e_up },
+ { bfd_mach_sh_dsp, arch_sh_dsp, arch_sh_dsp_up },
+ { bfd_mach_sh3, arch_sh3, arch_sh3_up },
+ { bfd_mach_sh3_nommu, arch_sh3_nommu, arch_sh3_nommu_up },
+ { bfd_mach_sh3_dsp, arch_sh3_dsp, arch_sh3_dsp_up },
+ { bfd_mach_sh3e, arch_sh3e, arch_sh3e_up },
+ { bfd_mach_sh4, arch_sh4, arch_sh4_up },
+ { bfd_mach_sh4a, arch_sh4a, arch_sh4a_up },
+ { bfd_mach_sh4al_dsp, arch_sh4al_dsp, arch_sh4al_dsp_up },
+ { bfd_mach_sh4_nofpu, arch_sh4_nofpu, arch_sh4_nofp_up },
+ { bfd_mach_sh4_nommu_nofpu, arch_sh4_nommu_nofpu, arch_sh4_nommu_nofpu_up },
+ { bfd_mach_sh4a_nofpu, arch_sh4a_nofpu, arch_sh4a_nofp_up },
+ { 0, 0, 0 } /* Terminator. */
+};
+
+
+/* Convert a BFD mach number into the right opcodes arch flags
+ using the table above. */
+
+unsigned int
+sh_get_arch_from_bfd_mach (unsigned long mach)
+{
+ int i = 0;
+
+ while (bfd_to_arch_table[i].bfd_mach != 0)
+ if (bfd_to_arch_table[i].bfd_mach == mach)
+ return bfd_to_arch_table[i].arch;
+ else
+ i++;
+
+ /* mach not found. */
+ BFD_FAIL();
+
+ return SH_ARCH_UNKNOWN_ARCH;
+}
+
+
+/* Convert a BFD mach number into a set of opcodes arch flags
+ describing all the compatible architectures (i.e. arch_up)
+ using the table above. */
+
+unsigned int
+sh_get_arch_up_from_bfd_mach (unsigned long mach)
+{
+ int i = 0;
+
+ while (bfd_to_arch_table[i].bfd_mach != 0)
+ if (bfd_to_arch_table[i].bfd_mach == mach)
+ return bfd_to_arch_table[i].arch_up;
+ else
+ i++;
+
+ /* mach not found. */
+ BFD_FAIL();
+
+ return SH_ARCH_UNKNOWN_ARCH;
+}
+
+
+/* Convert an arbitary arch_set - not necessarily corresponding
+ directly to anything in the table above - to the most generic
+ architecture which supports all the required features, and
+ return the corresponding BFD mach. */
+
+unsigned long
+sh_get_bfd_mach_from_arch_set (unsigned int arch_set)
+{
+ unsigned long result = 0;
+ unsigned int best = ~arch_set;
+ unsigned int co_mask = ~0;
+ int i = 0;
+
+ /* If arch_set permits variants with no coprocessor then do not allow
+ the other irrelevant co-processor bits to influence the choice:
+ e.g. if dsp is disallowed by arch_set, then the algorithm would
+ prefer fpu variants over nofpu variants because they also disallow
+ dsp - even though the nofpu would be the most correct choice.
+ This assumes that EVERY fpu/dsp variant has a no-coprocessor
+ counter-part, or their non-fpu/dsp instructions do not have the
+ no co-processor bit set. */
+ if (arch_set & arch_sh_no_co)
+ co_mask = ~(arch_sh_sp_fpu | arch_sh_dp_fpu | arch_sh_has_dsp);
+
+ while (bfd_to_arch_table[i].bfd_mach != 0)
+ {
+ unsigned int try = bfd_to_arch_table[i].arch_up & co_mask;
+
+ /* Conceptually: Find the architecture with the least number
+ of extra features or, if they have the same number, then
+ the greatest number of required features. Disregard
+ architectures where the required features alone do
+ not describe a valid architecture. */
+ if (((try & ~arch_set) < (best & ~arch_set)
+ || ((try & ~arch_set) == (best & ~arch_set)
+ && (~try & arch_set) < (~best & arch_set)))
+ && SH_MERGE_ARCH_SET_VALID (try, arch_set))
+ {
+ result = bfd_to_arch_table[i].bfd_mach;
+ best = try;
+ }
+
+ i++;
+ }
+
+ /* This might happen if a new variant is added to sh-opc.h
+ but no corresponding entry is added to the table above. */
+ BFD_ASSERT (result != 0);
+
+ return result;
+}
+
+
+/* Merge the architecture type of two BFD files, such that the
+ resultant architecture supports all the features required
+ by the two input BFDs.
+ If the input BFDs are multually incompatible - i.e. one uses
+ DSP while the other uses FPU - or there is no known architecture
+ that fits the requirements then an error is emitted. */
+
+bfd_boolean
+sh_merge_bfd_arch (bfd *ibfd, bfd *obfd)
+{
+ unsigned int old_arch, new_arch, merged_arch;
+
+ if (! _bfd_generic_verify_endian_match (ibfd, obfd))
+ return FALSE;
+
+ old_arch = sh_get_arch_up_from_bfd_mach (bfd_get_mach (obfd));
+ new_arch = sh_get_arch_up_from_bfd_mach (bfd_get_mach (ibfd));
+
+ merged_arch = SH_MERGE_ARCH_SET (old_arch, new_arch);
+
+ if (!SH_VALID_CO_ARCH_SET (merged_arch))
+ {
+ (*_bfd_error_handler)
+ ("%s: uses %s instructions while previous modules use %s instructions",
+ bfd_archive_filename (ibfd),
+ SH_ARCH_SET_HAS_DSP (new_arch) ? "dsp" : "floating point",
+ SH_ARCH_SET_HAS_DSP (new_arch) ? "floating point" : "dsp");
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
+ else if (!SH_VALID_ARCH_SET (merged_arch))
+ {
+ (*_bfd_error_handler)
+ ("internal error: merge of architecture '%s' with architecture '%s' produced unknown architecture\n",
+ bfd_printable_name (obfd),
+ bfd_printable_name (ibfd));
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
+
+ bfd_default_set_arch_mach (obfd, bfd_arch_sh,
+ sh_get_bfd_mach_from_arch_set (merged_arch));
+
+ return TRUE;
+}
#include "libbfd.h"
#include "elf-bfd.h"
#include "elf/sh.h"
+#include "libiberty.h"
static bfd_reloc_status_type sh_elf_reloc
(bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
}
#ifndef sh_elf_set_mach_from_flags
+static unsigned int sh_ef_bfd_table[] = { EF_SH_BFD_TABLE };
+
static bfd_boolean
sh_elf_set_mach_from_flags (bfd *abfd)
{
- flagword flags = elf_elfheader (abfd)->e_flags;
+ flagword flags = elf_elfheader (abfd)->e_flags & EF_SH_MACH_MASK;
+
+ if (flags >= sizeof(sh_ef_bfd_table))
+ return FALSE;
+
+ if (sh_ef_bfd_table[flags] == 0)
+ return FALSE;
+
+ bfd_default_set_arch_mach (abfd, bfd_arch_sh, sh_ef_bfd_table[flags]);
- switch (flags & EF_SH_MACH_MASK)
- {
- case EF_SH1:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh);
- break;
- case EF_SH2:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh2);
- break;
- case EF_SH2E:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh2e);
- break;
- case EF_SH_DSP:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh_dsp);
- break;
- case EF_SH3:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh3);
- break;
- case EF_SH3_DSP:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh3_dsp);
- break;
- case EF_SH3E:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh3e);
- break;
- case EF_SH_UNKNOWN:
- case EF_SH4:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh4);
- break;
- case EF_SH4_NOFPU:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh4_nofpu);
- break;
- case EF_SH4A:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh4a);
- break;
- case EF_SH4A_NOFPU:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh4a_nofpu);
- break;
- case EF_SH4AL_DSP:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh4al_dsp);
- break;
- case EF_SH4_NOMMU_NOFPU:
- bfd_default_set_arch_mach (abfd, bfd_arch_sh, bfd_mach_sh4_nommu_nofpu);
- break;
- default:
- return FALSE;
- }
return TRUE;
}
+
+
+/* Reverse table lookup for sh_ef_bfd_table[].
+ Given a bfd MACH value from archures.c
+ return the equivalent ELF flags from the table.
+ Return -1 if no match is found. */
+
+int
+sh_elf_get_flags_from_mach (unsigned long mach)
+{
+ int i = ARRAY_SIZE (sh_ef_bfd_table);
+
+ for (; i>0; i--)
+ if (sh_ef_bfd_table[i] == mach)
+ return i;
+
+ /* shouldn't get here */
+ BFD_FAIL();
+
+ return -1;
+}
#endif /* not sh_elf_set_mach_from_flags */
#ifndef sh_elf_set_private_flags
#endif /* not sh_elf_copy_private_data */
#ifndef sh_elf_merge_private_data
-/* This routine checks for linking big and little endian objects
- together, and for linking sh-dsp with sh3e / sh4 objects. */
-static bfd_boolean
-sh_elf_merge_private_data (bfd *ibfd, bfd *obfd)
+/* This function returns the ELF architecture number that
+ corresponds to the given arch_sh* flags. */
+int
+sh_find_elf_flags (unsigned int arch_set)
{
- flagword old_flags, new_flags;
+ unsigned long bfd_mach = sh_get_bfd_mach_from_arch_set (arch_set);
- if (! _bfd_generic_verify_endian_match (ibfd, obfd))
- return FALSE;
+ return sh_elf_get_flags_from_mach (bfd_mach);
+}
+
+
+/* This routine initialises the elf flags when required and
+ calls sh_merge_bfd_arch() to check dsp/fpu compatibility. */
+static bfd_boolean
+sh_elf_merge_private_data (bfd *ibfd, bfd *obfd)
+{
if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
|| bfd_get_flavour (obfd) != bfd_target_elf_flavour)
return TRUE;
/* This happens when ld starts out with a 'blank' output file. */
elf_flags_init (obfd) = TRUE;
elf_elfheader (obfd)->e_flags = EF_SH1;
+ sh_elf_set_mach_from_flags (obfd);
}
- old_flags = elf_elfheader (obfd)->e_flags;
- new_flags = elf_elfheader (ibfd)->e_flags;
- if ((EF_SH_HAS_DSP (old_flags) && EF_SH_HAS_FP (new_flags))
- || (EF_SH_HAS_DSP (new_flags) && EF_SH_HAS_FP (old_flags)))
- {
- (*_bfd_error_handler)
- ("%s: uses %s instructions while previous modules use %s instructions",
- bfd_archive_filename (ibfd),
- EF_SH_HAS_DSP (new_flags) ? "dsp" : "floating point",
- EF_SH_HAS_DSP (new_flags) ? "floating point" : "dsp");
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
- }
- elf_elfheader (obfd)->e_flags = EF_SH_MERGE_MACH (old_flags, new_flags);
- return sh_elf_set_mach_from_flags (obfd);
+ if ( ! sh_merge_bfd_arch (ibfd, obfd) )
+ return FALSE;
+
+ elf_elfheader (obfd)->e_flags =
+ sh_elf_get_flags_from_mach (bfd_get_mach (obfd));
+
+ return TRUE;
}
#endif /* not sh_elf_merge_private_data */
+2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
+
+ * Makefile.am: Regenerate dependecies.
+ * Makefile.in: Regenerate.
+ * config/tc-sh.c (valid_arch): Make unsigned.
+ (preset_target_arch): Likewise.
+ (md_begin): Use new architecture flags system.
+ (get_specific): Likewise.
+ (assemble_ppi): Likewise.
+ (md_assemble): Likewise. Also fix error check for bad opcodes.
+ (md_parse_option): Likewise. Also generate -isa values according
+ to the table in bfd/cpu-sh.c instead of just constants. Also
+ allow <arch>-up ISA variants.
+ (sh_elf_final_processing): Replace if-else chain with a call to
+ sh_find_elf_flags().
+ * testsuite/gas/sh/arch: New directory.
+ * testsuite/gas/sh/arch/arch.exp: New test script.
+ * testsuite/gas/sh/arch/arch_expected.txt: New file.
+ * testsuite/gas/sh/arch/sh.s: New file.
+ * testsuite/gas/sh/arch/sh2.s: New file.
+ * testsuite/gas/sh/arch/sh-dsp.s: New file.
+ * testsuite/gas/sh/arch/sh2e.s: New file.
+ * testsuite/gas/sh/arch/sh3-nommu.s: New file.
+ * testsuite/gas/sh/arch/sh3.s: New file.
+ * testsuite/gas/sh/arch/sh3-dsp.s: New file.
+ * testsuite/gas/sh/arch/sh3e.s: New file.
+ * testsuite/gas/sh/arch/sh4-nommu-nofpu.s: New file.
+ * testsuite/gas/sh/arch/sh4-nofpu.s: New file.
+ * testsuite/gas/sh/arch/sh4.s: New file.
+ * testsuite/gas/sh/arch/sh4a-nofpu.s: New file.
+ * testsuite/gas/sh/arch/sh4al-dsp.s: New file.
+ * testsuite/gas/sh/arch/sh4a.s: New file.
+
2004-05-28 Peter Barada <peter@the-baradas.com>
* config/gc-m68k.c(m68k_ip): Convert mode 5 addressing
cond.o: cond.c $(INCDIR)/symcat.h macro.h sb.h $(INCDIR)/obstack.h
depend.o: depend.c $(INCDIR)/symcat.h
dwarf2dbg.o: dwarf2dbg.c $(INCDIR)/symcat.h dwarf2dbg.h \
- $(INCDIR)/filenames.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/elf/dwarf2.h
+ subsegs.h $(INCDIR)/obstack.h $(INCDIR)/elf/dwarf2.h
dw2gencfi.o: dw2gencfi.c $(INCDIR)/symcat.h dw2gencfi.h \
$(INCDIR)/elf/dwarf2.h
ecoff.o: ecoff.c $(INCDIR)/symcat.h ecoff.h
cond.o: cond.c $(INCDIR)/symcat.h macro.h sb.h $(INCDIR)/obstack.h
depend.o: depend.c $(INCDIR)/symcat.h
dwarf2dbg.o: dwarf2dbg.c $(INCDIR)/symcat.h dwarf2dbg.h \
- $(INCDIR)/filenames.h subsegs.h $(INCDIR)/obstack.h \
- $(INCDIR)/elf/dwarf2.h
+ subsegs.h $(INCDIR)/obstack.h $(INCDIR)/elf/dwarf2.h
dw2gencfi.o: dw2gencfi.c $(INCDIR)/symcat.h dw2gencfi.h \
$(INCDIR)/elf/dwarf2.h
ecoff.o: ecoff.c $(INCDIR)/symcat.h ecoff.h
/* preset architecture set, if given; zero otherwise. */
-static int preset_target_arch;
+static unsigned int preset_target_arch;
/* The bit mask of architectures that could
accommodate the insns seen so far. */
-static int valid_arch;
+static unsigned int valid_arch;
const char EXP_CHARS[] = "eE";
{
const sh_opcode_info *opcode;
char *prev_name = "";
- int target_arch;
+ unsigned int target_arch;
target_arch
- = preset_target_arch ? preset_target_arch : arch_sh1_up & ~arch_sh_dsp_up;
+ = preset_target_arch ? preset_target_arch : arch_sh1_up & ~arch_sh_has_dsp;
valid_arch = target_arch;
#ifdef HAVE_SH64
{
if (strcmp (prev_name, opcode->name) != 0)
{
- if (! (opcode->arch & target_arch))
+ if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch))
continue;
prev_name = opcode->name;
hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
goto fail;
}
}
- if ( !(valid_arch & this_try->arch))
+ if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch))
goto fail;
- valid_arch &= this_try->arch;
+ valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch);
return this_try;
fail:
;
field_b -= 0x8100;
/* pclr Dz pmuls Se,Sf,Dg */
else if ((field_b & 0xff00) == 0x8d00
- && (valid_arch & arch_sh4al_dsp_up))
+ && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up)))
{
- valid_arch &= arch_sh4al_dsp_up;
+ valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up);
field_b -= 0x8cf0;
}
else
/* search for opcode in full list */
for (op = sh_table; op->name; op++)
{
- if (strncasecmp (op->name, name, name_length) == 0)
+ if (strncasecmp (op->name, name, name_length) == 0
+ && op->name[name_length] == '\0')
{
found = 1;
break;
{
/* Since we skip get_specific here, we have to check & update
valid_arch now. */
- if (valid_arch & opcode->arch)
- valid_arch &= opcode->arch;
+ if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch))
+ valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch);
else
as_bad (_("Delayed branches not available on SH1"));
parse_exp (op_end + 1, &operand[0]);
break;
case OPTION_DSP:
- preset_target_arch = arch_sh1_up & ~arch_sh2e_up;
+ preset_target_arch = arch_sh1_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu);
break;
case OPTION_RENESAS:
else if (strcasecmp (arg, "sh4a") == 0)
preset_target_arch = arch_sh4a;
else if (strcasecmp (arg, "dsp") == 0)
- preset_target_arch = arch_sh1_up & ~arch_sh2e_up;
+ preset_target_arch = arch_sh1_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu);
else if (strcasecmp (arg, "fp") == 0)
- preset_target_arch = arch_sh2e_up;
+ preset_target_arch = arch_sh1_up & ~arch_sh_has_dsp;
else if (strcasecmp (arg, "any") == 0)
preset_target_arch = arch_sh1_up;
#ifdef HAVE_SH64
}
#endif /* HAVE_SH64 */
else
- as_bad ("Invalid argument to --isa option: %s", arg);
+ {
+ extern const bfd_arch_info_type bfd_sh_arch;
+ extern unsigned int sh_ef_archset_table[];
+ bfd_arch_info_type *bfd_arch = &bfd_sh_arch;
+ preset_target_arch = 0;
+ for (; bfd_arch; bfd_arch=bfd_arch->next)
+ {
+ int len = strlen(bfd_arch->printable_name);
+
+ if (bfd_arch->mach == bfd_mach_sh5)
+ continue;
+
+ if (strncasecmp (bfd_arch->printable_name, arg, len) != 0)
+ continue;
+
+ if (arg[len] == '\0')
+ preset_target_arch =
+ sh_get_arch_from_bfd_mach (bfd_arch->mach);
+ else if (strcasecmp(&arg[len], "-up") == 0)
+ preset_target_arch =
+ sh_get_arch_up_from_bfd_mach (bfd_arch->mach);
+ else
+ continue;
+ break;
+ }
+
+ if (!preset_target_arch)
+ as_bad ("Invalid argument to --isa option: %s", arg);
+ }
break;
#ifdef HAVE_SH64
compatibility with Renesas assembler.\n\
-small align sections to 4 byte boundaries, not 16\n\
-dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
--isa=[sh4\n\
- | sh4-nofpu sh4 with fpu disabled\n\
- | sh4-nommu-nofpu sh4 with no MMU or FPU\n\
- | sh4a\n\
+-isa=[any use most appropriate isa\n\
| dsp same as '-dsp'\n\
- | fp\n\
- | any] use most appropriate isa\n"));
+ | fp"));
+ {
+ extern const bfd_arch_info_type bfd_sh_arch;
+ bfd_arch_info_type *bfd_arch = &bfd_sh_arch;
+ for (; bfd_arch; bfd_arch=bfd_arch->next)
+ if (bfd_arch->mach != bfd_mach_sh5)
+ {
+ fprintf (stream, "\n | %s", bfd_arch->printable_name);
+ fprintf (stream, "\n | %s-up", bfd_arch->printable_name);
+ }
+ }
+ fprintf (stream, "]\n");
#ifdef HAVE_SH64
fprintf (stream, _("\
-isa=[shmedia set as the default instruction set for SH64\n\
val = EF_SH5;
else
#endif /* HAVE_SH64 */
- if (valid_arch & arch_sh1)
- val = EF_SH1;
- else if (valid_arch & arch_sh2)
- val = EF_SH2;
- else if (valid_arch & arch_sh2e)
- val = EF_SH2E;
- else if (valid_arch & arch_sh_dsp)
- val = EF_SH_DSP;
- else if (valid_arch & arch_sh3)
- val = EF_SH3;
- else if (valid_arch & arch_sh3_dsp)
- val = EF_SH3_DSP;
- else if (valid_arch & arch_sh3e)
- val = EF_SH3E;
- else if (valid_arch & arch_sh4_nommu_nofpu)
- val = EF_SH4_NOMMU_NOFPU;
- else if (valid_arch & arch_sh4_nofpu)
- val = EF_SH4_NOFPU;
- else if (valid_arch & arch_sh4)
- val = EF_SH4;
- else if (valid_arch & arch_sh4a_nofpu)
- val = EF_SH4A_NOFPU;
- else if (valid_arch & arch_sh4a)
- val = EF_SH4A;
- else if (valid_arch & arch_sh4al_dsp)
- val = EF_SH4AL_DSP;
- else
- abort ();
+ val = sh_find_elf_flags (valid_arch);
elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK;
elf_elfheader (stdoutput)->e_flags |= val;
+2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
+
+ * sh.h (EF_SH_HAS_DSP): Remove.
+ (EF_SH_HAS_FP): Remove.
+ (EF_SH_MERGE_MACH): Remove.
+ (EF_SH4_NOFPU): Convert to decimal.
+ (EF_SH4A_NOFPU): Likewise.
+ (EF_SH4_NOMMU_NOFPU): Likewise.
+ (EF_SH3_NOMMU): Add new macro.
+ (EF_SH_BFD_TABLE): Likewise.
+ (sh_find_elf_flags): Add prototype.
+ (sh_elf_get_flags_from_mach): Likewise.
+
2004-04-24 Chris Demetriou <cgd@broadcom.com>
* mips.h (R_MIPS_PC32, R_MIPS_PC64, R_MIPS_GNU_REL_LO16)
#define EF_SH1 1
#define EF_SH2 2
#define EF_SH3 3
-#define EF_SH_HAS_DSP(flags) (((flags) & EF_SH_MACH_MASK & ~3) == 4)
#define EF_SH_DSP 4
#define EF_SH3_DSP 5
#define EF_SH4AL_DSP 6
-#define EF_SH_HAS_FP(flags) ((flags) & 8)
#define EF_SH3E 8
#define EF_SH4 9
#define EF_SH2E 11
#define EF_SH4A 12
-#define EF_SH4_NOFPU 0x10
-#define EF_SH4A_NOFPU 0x11
-#define EF_SH4_NOMMU_NOFPU 0x12
+#define EF_SH4_NOFPU 16
+#define EF_SH4A_NOFPU 17
+#define EF_SH4_NOMMU_NOFPU 18
+#define EF_SH3_NOMMU 20
/* This one can only mix in objects from other EF_SH5 objects. */
#define EF_SH5 10
-#define EF_SH_MERGE_MACH(mach1, mach2) \
- (((((mach1) == EF_SH3 || (mach1) == EF_SH_UNKNOWN) && (mach2) == EF_SH_DSP) \
- || ((mach1) == EF_SH_DSP \
- && ((mach2) == EF_SH3 || (mach2) == EF_SH_UNKNOWN))) \
- ? EF_SH3_DSP \
- : (((mach1) < EF_SH3 && (mach2) == EF_SH_UNKNOWN) \
- || ((mach2) < EF_SH3 && (mach1) == EF_SH_UNKNOWN)) \
- ? EF_SH3 \
- : ((mach1) == EF_SH2E && EF_SH_HAS_FP (mach2)) \
- ? (mach2) \
- : ((mach2) == EF_SH2E && EF_SH_HAS_FP (mach1)) \
- ? (mach1) \
- : (((mach1) == EF_SH2E && (mach2) == EF_SH_UNKNOWN) \
- || ((mach2) == EF_SH2E && (mach1) == EF_SH_UNKNOWN)) \
- ? EF_SH2E \
- : (((mach1) == EF_SH3E && (mach2) == EF_SH_UNKNOWN) \
- || ((mach2) == EF_SH3E && (mach1) == EF_SH_UNKNOWN)) \
- ? EF_SH4 \
- /* ??? SH4? Why not SH3E? */ \
- : ((((mach1) == EF_SH4_NOFPU || (mach1) == EF_SH4A_NOFPU) \
- && EF_SH_HAS_DSP (mach2)) \
- || (((mach2) == EF_SH4_NOFPU || (mach2) == EF_SH4A_NOFPU) \
- && EF_SH_HAS_DSP (mach1))) \
- ? EF_SH4AL_DSP \
- : ((mach1) == EF_SH4_NOFPU && EF_SH_HAS_FP (mach2)) \
- ? ((mach2) < EF_SH4A) ? EF_SH4 : (mach2) \
- : ((mach2) == EF_SH4_NOFPU && EF_SH_HAS_FP (mach1)) \
- ? ((mach1) < EF_SH4A) ? EF_SH4 : (mach1) \
- : ((mach1) == EF_SH4A_NOFPU && EF_SH_HAS_FP (mach2)) \
- ? ((mach2) <= EF_SH4A) ? EF_SH4A : (mach2) \
- : ((mach2) == EF_SH4A_NOFPU && EF_SH_HAS_FP (mach1)) \
- ? ((mach1) <= EF_SH4A) ? EF_SH4A : (mach1) \
- : (((mach1) == EF_SH2E ? 7 : (mach1)) > ((mach2) == EF_SH2E ? 7 : (mach2)) \
- ? (mach1) : (mach2)))
+/* Define the mapping from ELF to bfd mach numbers.
+ bfd_mach_* are defined in bfd_in2.h (generated from
+ archures.c). */
+#define EF_SH_BFD_TABLE \
+/* EF_SH_UNKNOWN */ bfd_mach_sh3 , \
+/* EF_SH1 */ bfd_mach_sh , \
+/* EF_SH2 */ bfd_mach_sh2 , \
+/* EF_SH3 */ bfd_mach_sh3 , \
+/* EF_SH_DSP */ bfd_mach_sh_dsp , \
+/* EF_SH3_DSP */ bfd_mach_sh3_dsp , \
+/* EF_SHAL_DSP */ bfd_mach_sh4al_dsp , \
+/* 7 */ 0, \
+/* EF_SH3E */ bfd_mach_sh3e , \
+/* EF_SH4 */ bfd_mach_sh4 , \
+/* EF_SH5 */ 0, \
+/* EF_SH2E */ bfd_mach_sh2e , \
+/* EF_SH4A */ bfd_mach_sh4a , \
+/* 13, 14, 15 */ 0, 0, 0, \
+/* EF_SH4_NOFPU */ bfd_mach_sh4_nofpu , \
+/* EF_SH4A_NOFPU */ bfd_mach_sh4a_nofpu , \
+/* EF_SH4_NOMMU_NOFPU */ bfd_mach_sh4_nommu_nofpu, \
+/* 19 */ 0, \
+/* EF_SH3_NOMMU */ bfd_mach_sh3_nommu
+
+/* Convert arch_sh* into EF_SH*. */
+int sh_find_elf_flags (unsigned int arch_set);
+
+/* Convert bfd_mach_* into EF_SH*. */
+int sh_elf_get_flags_from_mach (unsigned long mach);
/* Flags for the st_other symbol field.
Keep away from the STV_ visibility flags (bit 0..1). */
+2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
+
+ * testsuite/ld-sh/arch/arch.exp: New test script.
+ * testsuite/ld-sh/arch/arch_expected.txt: New file.
+ * testsuite/ld-sh/arch/sh.s: New file.
+ * testsuite/ld-sh/arch/sh2.s: New file.
+ * testsuite/ld-sh/arch/sh-dsp.s: New file.
+ * testsuite/ld-sh/arch/sh2e.s: New file.
+ * testsuite/ld-sh/arch/sh3-nommu.s: New file.
+ * testsuite/ld-sh/arch/sh3.s: New file.
+ * testsuite/ld-sh/arch/sh3-dsp.s: New file.
+ * testsuite/ld-sh/arch/sh3e.s: New file.
+ * testsuite/ld-sh/arch/sh4-nommu-nofpu.s: New file.
+ * testsuite/ld-sh/arch/sh4-nofpu.s: New file.
+ * testsuite/ld-sh/arch/sh4.s: New file.
+ * testsuite/ld-sh/arch/sh4a-nofpu.s: New file.
+ * testsuite/ld-sh/arch/sh4al-dsp.s: New file.
+ * testsuite/ld-sh/arch/sh4a.s: New file.
+
2004-05-28 Alan Modra <amodra@bigpond.net.au>
* ldlang.c: Formatting. Wrap long lines, expand bfd_get_section_flags
+2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
+
+ * sh-dis.c (target_arch): Make unsigned.
+ (print_insn_sh): Replace (most of) switch with a call to
+ sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
+ * sh-opc.h: Redefine architecture flags values.
+ Add sh3-nommu architecture.
+ Reorganise <arch>_up macros so they make more visual sense.
+ (SH_MERGE_ARCH_SET): Define new macro.
+ (SH_VALID_BASE_ARCH_SET): Likewise.
+ (SH_VALID_MMU_ARCH_SET): Likewise.
+ (SH_VALID_CO_ARCH_SET): Likewise.
+ (SH_VALID_ARCH_SET): Likewise.
+ (SH_MERGE_ARCH_SET_VALID): Likewise.
+ (SH_ARCH_SET_HAS_FPU): Likewise.
+ (SH_ARCH_SET_HAS_DSP): Likewise.
+ (SH_ARCH_UNKNOWN_ARCH): Likewise.
+ (sh_get_arch_from_bfd_mach): Add prototype.
+ (sh_get_arch_up_from_bfd_mach): Likewise.
+ (sh_get_bfd_mach_from_arch_set): Likewise.
+ (sh_merge_bfd_arc): Likewise.
+
2004-05-24 Peter Barada <peter@the-baradas.com>
* m68k-dis.c(print_insn_m68k): Strip body of diassembly out
int status;
bfd_vma relmask = ~(bfd_vma) 0;
const sh_opcode_info *op;
- int target_arch;
+ unsigned int target_arch;
switch (info->mach)
{
&& bfd_asymbol_flavour(*info->symbols) == bfd_target_coff_flavour)
target_arch = arch_sh4;
break;
- case bfd_mach_sh2:
- target_arch = arch_sh2;
- break;
- case bfd_mach_sh2e:
- target_arch = arch_sh2e;
- break;
- case bfd_mach_sh_dsp:
- target_arch = arch_sh_dsp;
- break;
- case bfd_mach_sh3:
- target_arch = arch_sh3;
- break;
- case bfd_mach_sh3_dsp:
- target_arch = arch_sh3_dsp;
- break;
- case bfd_mach_sh3e:
- target_arch = arch_sh3e;
- break;
- case bfd_mach_sh4_nofpu:
- target_arch = arch_sh4_nofpu;
- break;
- case bfd_mach_sh4:
- target_arch = arch_sh4;
- break;
- case bfd_mach_sh4a:
- case bfd_mach_sh4a_nofpu:
- target_arch = arch_sh4a;
- break;
- case bfd_mach_sh4al_dsp:
- target_arch = arch_sh4al_dsp;
- break;
- case bfd_mach_sh4_nommu_nofpu:
- target_arch = arch_sh4_nommu_nofpu;
- break;
case bfd_mach_sh5:
#ifdef INCLUDE_SHMEDIA
status = print_insn_sh64 (memaddr, info);
target_arch = arch_sh4;
break;
default:
- abort ();
+ target_arch = sh_get_arch_from_bfd_mach (info->mach);
}
status = info->read_memory_func (memaddr, insn, 2, info);
nibs[3] = insn[1] & 0xf;
}
- if (nibs[0] == 0xf && (nibs[1] & 4) == 0 && target_arch & arch_sh_dsp_up)
+ if (nibs[0] == 0xf && (nibs[1] & 4) == 0
+ && SH_MERGE_ARCH_SET_VALID (target_arch, arch_sh_dsp_up))
{
if (nibs[1] & 8)
{
int disp_pc;
bfd_vma disp_pc_addr = 0;
- if ((op->arch & target_arch) == 0)
+ if (!SH_MERGE_ARCH_SET_VALID (op->arch, target_arch))
goto fail;
for (n = 0; n < 4; n++)
{
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+#include "bfd.h"
+
typedef enum
{
HEX_0,
}
sh_dsp_reg_nums;
-#define arch_sh1 0x0001
-#define arch_sh2 0x0002
-#define arch_sh3 0x0004
-#define arch_sh3e 0x0008
-#define arch_sh4 0x0010
-#define arch_sh2e 0x0020
-#define arch_sh4a 0x0040
-#define arch_sh_dsp 0x0100
-#define arch_sh3_dsp 0x0200
-#define arch_sh4al_dsp 0x0400
-#define arch_sh4_nofpu 0x1000
-#define arch_sh4a_nofpu 0x2000
-#define arch_sh4_nommu_nofpu 0x4000 /* no mmu nor fpu */
-
-#define arch_sh1_up (arch_sh1 | arch_sh2_up)
-#define arch_sh2_up (arch_sh2 | arch_sh2e_up | arch_sh3_up | arch_sh_dsp)
+#define arch_sh1_base 0x0001
+#define arch_sh2_base 0x0002
+#define arch_sh3_base 0x0004
+#define arch_sh4_base 0x0008
+#define arch_sh4a_base 0x0010
+#define arch_sh_no_mmu 0x04000000
+#define arch_sh_has_mmu 0x08000000
+#define arch_sh_no_co 0x10000000 /* neither FPU nor DSP co-processor */
+#define arch_sh_sp_fpu 0x20000000 /* single precision FPU */
+#define arch_sh_dp_fpu 0x40000000 /* double precision FPU */
+#define arch_sh_has_dsp 0x80000000
+
+#define arch_sh_base_mask 0x0000001f
+#define arch_sh_mmu_mask 0x0c000000
+#define arch_sh_co_mask 0xf0000000
+
+#define arch_sh1 (arch_sh1_base|arch_sh_no_mmu|arch_sh_no_co)
+#define arch_sh2 (arch_sh2_base|arch_sh_no_mmu|arch_sh_no_co)
+#define arch_sh2e (arch_sh2_base|arch_sh_no_mmu|arch_sh_sp_fpu)
+#define arch_sh_dsp (arch_sh2_base|arch_sh_no_mmu|arch_sh_has_dsp)
+#define arch_sh3_nommu (arch_sh3_base|arch_sh_no_mmu|arch_sh_no_co)
+#define arch_sh3 (arch_sh3_base|arch_sh_has_mmu|arch_sh_no_co)
+#define arch_sh3e (arch_sh3_base|arch_sh_has_mmu|arch_sh_sp_fpu)
+#define arch_sh3_dsp (arch_sh3_base|arch_sh_has_mmu|arch_sh_has_dsp)
+#define arch_sh4 (arch_sh4_base|arch_sh_has_mmu|arch_sh_dp_fpu)
+#define arch_sh4a (arch_sh4a_base|arch_sh_has_mmu|arch_sh_dp_fpu)
+#define arch_sh4al_dsp (arch_sh4a_base|arch_sh_has_mmu|arch_sh_has_dsp)
+#define arch_sh4_nofpu (arch_sh4_base|arch_sh_has_mmu|arch_sh_no_co)
+#define arch_sh4a_nofpu (arch_sh4a_base|arch_sh_has_mmu|arch_sh_no_co)
+#define arch_sh4_nommu_nofpu (arch_sh4_base|arch_sh_no_mmu|arch_sh_no_co)
+
+#define SH_MERGE_ARCH_SET(SET1, SET2) ((SET1) & (SET2))
+#define SH_VALID_BASE_ARCH_SET(SET) (((SET) & arch_sh_base_mask) != 0)
+#define SH_VALID_MMU_ARCH_SET(SET) (((SET) & arch_sh_mmu_mask) != 0)
+#define SH_VALID_CO_ARCH_SET(SET) (((SET) & arch_sh_co_mask) != 0)
+#define SH_VALID_ARCH_SET(SET) \
+ (SH_VALID_BASE_ARCH_SET (SET) \
+ && SH_VALID_MMU_ARCH_SET (SET) \
+ && SH_VALID_CO_ARCH_SET (SET))
+#define SH_MERGE_ARCH_SET_VALID(SET1, SET2) \
+ SH_VALID_ARCH_SET (SH_MERGE_ARCH_SET (SET1, SET2))
+
+#define SH_ARCH_SET_HAS_FPU(SET) \
+ (((SET) & (arch_sh_sp_fpu | arch_sh_dp_fpu)) != 0)
+#define SH_ARCH_SET_HAS_DSP(SET) \
+ (((SET) & arch_sh_has_dsp) != 0)
+
+/* This is returned from the functions below when an error occurs
+ (in addition to a call to BFD_FAIL). The value should allow
+ the tools to continue to function in most cases - there may
+ be some confusion between DSP and FPU etc. */
+#define SH_ARCH_UNKNOWN_ARCH 0xffffffff
+
+/* These are defined in bfd/cpu-sh.c . */
+unsigned int sh_get_arch_from_bfd_mach (unsigned long mach);
+unsigned int sh_get_arch_up_from_bfd_mach (unsigned long mach);
+unsigned long sh_get_bfd_mach_from_arch_set (unsigned int arch_set);
+bfd_boolean sh_merge_bfd_arch (bfd *ibfd, bfd *obfd);
+
+/* Below are the 'architecture sets'.
+ They describe the following inheritance graph:
+
+ SH1
+ |
+ SH2
+ .------------'|`--------------------.
+ / | \
+SH-DSP SH3-nommu SH2E
+ | |`--------. |
+ | | \ |
+ | SH3 SH4-nommu-nofpu |
+ | | | |
+ | .------------'|`----------+---------. |
+ |/ / \|
+ | | .-------' |
+ | |/ |
+SH3-dsp SH4-nofpu SH3E
+ | |`--------------------. |
+ | | \|
+ | SH4A-nofpu SH4
+ | .------------' `--------------------. |
+ |/ \|
+SH4AL-dsp SH4A
+
+*/
+
+/* Central branches */
+#define arch_sh1_up (arch_sh1 | arch_sh2_up)
+#define arch_sh2_up (arch_sh2 | arch_sh2e_up | arch_sh3_nommu_up | arch_sh_dsp_up)
+#define arch_sh3_nommu_up (arch_sh3_nommu | arch_sh3_up | arch_sh4_nommu_nofpu_up)
+#define arch_sh3_up (arch_sh3 | arch_sh3e_up | arch_sh3_dsp_up | arch_sh4_nofp_up)
+#define arch_sh4_nommu_nofpu_up (arch_sh4_nommu_nofpu | arch_sh4_nofp_up)
+#define arch_sh4_nofp_up (arch_sh4_nofpu | arch_sh4_up | arch_sh4a_nofp_up)
+#define arch_sh4a_nofp_up (arch_sh4a_nofpu | arch_sh4a_up | arch_sh4al_dsp_up)
+
+/* Right branch */
#define arch_sh2e_up (arch_sh2e | arch_sh3e_up)
-#define arch_sh3_up (arch_sh3 | arch_sh3e_up | arch_sh3_dsp_up \
- | arch_sh4_nommu_nofpu_up)
#define arch_sh3e_up (arch_sh3e | arch_sh4_up)
#define arch_sh4_up (arch_sh4 | arch_sh4a_up)
#define arch_sh4a_up (arch_sh4a)
-#define arch_sh_dsp_up (arch_sh_dsp | arch_sh3_dsp_up)
-#define arch_sh3_dsp_up (arch_sh3_dsp | arch_sh4al_dsp_up)
+/* Left branch */
+#define arch_sh_dsp_up (arch_sh_dsp | arch_sh3_dsp_up)
+#define arch_sh3_dsp_up (arch_sh3_dsp | arch_sh4al_dsp_up)
#define arch_sh4al_dsp_up (arch_sh4al_dsp)
-#define arch_sh4_nommu_nofpu_up (arch_sh4_nommu_nofpu | arch_sh4_nofp_up)
-
-#define arch_sh4_nofp_up (arch_sh4_nofpu | arch_sh4_up | arch_sh4a_nofp_up)
-#define arch_sh4a_nofp_up (arch_sh4a_nofpu | arch_sh4a_up | arch_sh4al_dsp_up)
-#define arch_sh_any_with_mmu (arch_sh3 | arch_sh3e_up | arch_sh3_dsp_up \
- | arch_sh4_nofp_up) /* arch _sh3_up omitting arch_sh4_nommu_nofpu */
typedef struct
{
char *name;
sh_arg_type arg[4];
sh_nibble_type nibbles[5];
- int arch;
+ unsigned int arch;
} sh_opcode_info;
#ifdef DEFINE_TABLE
/* 0100nnnn01101110 ldc <REG_N>,RS */{"ldc",{A_REG_N,A_RS},{HEX_4,REG_N,HEX_6,HEX_E}, arch_sh_dsp_up},
-/* 0100nnnn00111110 ldc <REG_N>,SSR */{"ldc",{A_REG_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_E}, arch_sh3_up},
+/* 0100nnnn00111110 ldc <REG_N>,SSR */{"ldc",{A_REG_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_E}, arch_sh3_nommu_up},
-/* 0100nnnn01001110 ldc <REG_N>,SPC */{"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}, arch_sh3_up},
+/* 0100nnnn01001110 ldc <REG_N>,SPC */{"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}, arch_sh3_nommu_up},
/* 0100nnnn11111010 ldc <REG_N>,DBR */{"ldc",{A_REG_N,A_DBR},{HEX_4,REG_N,HEX_F,HEX_A}, arch_sh4_nommu_nofpu_up},
-/* 0100nnnn1xxx1110 ldc <REG_N>,Rn_BANK */{"ldc",{A_REG_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_E}, arch_sh3_up},
+/* 0100nnnn1xxx1110 ldc <REG_N>,Rn_BANK */{"ldc",{A_REG_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_E}, arch_sh3_nommu_up},
/* 0100nnnn00000111 ldc.l @<REG_N>+,SR */{"ldc.l",{A_INC_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_7}, arch_sh1_up},
/* 0100nnnn01100111 ldc.l @<REG_N>+,RS */{"ldc.l",{A_INC_N,A_RS},{HEX_4,REG_N,HEX_6,HEX_7}, arch_sh_dsp_up},
-/* 0100nnnn00110111 ldc.l @<REG_N>+,SSR */{"ldc.l",{A_INC_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_7}, arch_sh3_up},
+/* 0100nnnn00110111 ldc.l @<REG_N>+,SSR */{"ldc.l",{A_INC_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_7}, arch_sh3_nommu_up},
-/* 0100nnnn01000111 ldc.l @<REG_N>+,SPC */{"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}, arch_sh3_up},
+/* 0100nnnn01000111 ldc.l @<REG_N>+,SPC */{"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}, arch_sh3_nommu_up},
/* 0100nnnn11110110 ldc.l @<REG_N>+,DBR */{"ldc.l",{A_INC_N,A_DBR},{HEX_4,REG_N,HEX_F,HEX_6}, arch_sh4_nommu_nofpu_up},
-/* 0100nnnn1xxx0111 ldc.l <REG_N>,Rn_BANK */{"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}, arch_sh3_up},
+/* 0100nnnn1xxx0111 ldc.l <REG_N>,Rn_BANK */{"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}, arch_sh3_nommu_up},
/* 0100mmmm00110100 ldrc <REG_M> */{"ldrc",{A_REG_M},{HEX_4,REG_M,HEX_3,HEX_4}, arch_sh4al_dsp_up},
/* 10001010i8*1.... ldrc #<imm> */{"ldrc",{A_IMM},{HEX_8,HEX_A,IMM0_8}, arch_sh4al_dsp_up},
/* 0100nnnn01100110 lds.l @<REG_M>+,FPSCR*/{"lds.l",{A_INC_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_6}, arch_sh2e_up},
-/* 0000000000111000 ldtlb */{"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}, arch_sh_any_with_mmu},
+/* 0000000000111000 ldtlb */{"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}, arch_sh3_up},
/* 0100nnnnmmmm1111 mac.w @<REG_M>+,@<REG_N>+*/{"mac.w",{A_INC_M,A_INC_N},{HEX_4,REG_N,REG_M,HEX_F}, arch_sh1_up},
/* repeat start end #<imm> */{"repeat",{A_DISP_PC,A_DISP_PC,A_IMM},{REPEAT,HEX_2,IMM0_8,HEX_8}, arch_sh_dsp_up},
-/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh3_up},
+/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh3_nommu_up},
-/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh3_up},
+/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh3_nommu_up},
/* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh1_up},
/* 0000nnnn01100010 stc RS,<REG_N> */{"stc",{A_RS,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_2}, arch_sh_dsp_up},
-/* 0000nnnn00110010 stc SSR,<REG_N> */{"stc",{A_SSR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_2}, arch_sh3_up},
+/* 0000nnnn00110010 stc SSR,<REG_N> */{"stc",{A_SSR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_2}, arch_sh3_nommu_up},
-/* 0000nnnn01000010 stc SPC,<REG_N> */{"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}, arch_sh3_up},
+/* 0000nnnn01000010 stc SPC,<REG_N> */{"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}, arch_sh3_nommu_up},
/* 0000nnnn00111010 stc SGR,<REG_N> */{"stc",{A_SGR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_A}, arch_sh4_nommu_nofpu_up},
/* 0000nnnn11111010 stc DBR,<REG_N> */{"stc",{A_DBR,A_REG_N},{HEX_0,REG_N,HEX_F,HEX_A}, arch_sh4_nommu_nofpu_up},
-/* 0000nnnn1xxx0010 stc Rn_BANK,<REG_N> */{"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}, arch_sh3_up},
+/* 0000nnnn1xxx0010 stc Rn_BANK,<REG_N> */{"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}, arch_sh3_nommu_up},
/* 0100nnnn00000011 stc.l SR,@-<REG_N> */{"stc.l",{A_SR,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_3}, arch_sh1_up},
/* 0100nnnn01100011 stc.l RS,@-<REG_N> */{"stc.l",{A_RS,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_3}, arch_sh_dsp_up},
-/* 0100nnnn00110011 stc.l SSR,@-<REG_N> */{"stc.l",{A_SSR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_3}, arch_sh3_up},
+/* 0100nnnn00110011 stc.l SSR,@-<REG_N> */{"stc.l",{A_SSR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_3}, arch_sh3_nommu_up},
-/* 0100nnnn01000011 stc.l SPC,@-<REG_N> */{"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}, arch_sh3_up},
+/* 0100nnnn01000011 stc.l SPC,@-<REG_N> */{"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}, arch_sh3_nommu_up},
/* 0100nnnn00010011 stc.l GBR,@-<REG_N> */{"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}, arch_sh1_up},
/* 0100nnnn11110010 stc.l DBR,@-<REG_N> */{"stc.l",{A_DBR,A_DEC_N},{HEX_4,REG_N,HEX_F,HEX_2}, arch_sh4_nommu_nofpu_up},
-/* 0100nnnn1xxx0011 stc.l Rn_BANK,@-<REG_N> */{"stc.l",{A_REG_B,A_DEC_N},{HEX_4,REG_N,REG_B,HEX_3}, arch_sh3_up},
+/* 0100nnnn1xxx0011 stc.l Rn_BANK,@-<REG_N> */{"stc.l",{A_REG_B,A_DEC_N},{HEX_4,REG_N,REG_B,HEX_3}, arch_sh3_nommu_up},
/* 0000nnnn00001010 sts MACH,<REG_N> */{"sts",{A_MACH,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_A}, arch_sh1_up},
projects / external / binutils.git / commitdiff