u32 g_rx_fifo_sz;
u32 g_np_g_tx_fifo_sz;
u32 g_tx_fifo_sz[MAX_EPS_CHANNELS];
+#if IS_ENABLED(CONFIG_EXTCON)
+ bool g_extcon_always_on;
+#endif
#endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */
};
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/of_platform.h>
+#include <linux/extcon.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
/* Enable dma if requested in device tree */
hsotg->g_using_dma = of_property_read_bool(np, "g-use-dma");
+#if IS_ENABLED(CONFIG_EXTCON)
+ hsotg->g_extcon_always_on =
+ of_property_read_bool(np, "g-extcon-always-on");
+#endif
/*
* Register TX periodic fifo size per endpoint.
* EP0 is excluded since it has no fifo configuration.
}
dwc2_hsotg_dump(hsotg);
+#if IS_ENABLED(CONFIG_EXTCON)
+ if (hsotg->g_extcon_always_on) {
+ struct extcon_dev *edev;
+ static const unsigned int supported_cable[] = {
+ EXTCON_USB,
+ EXTCON_NONE,
+ };
+
+ edev = devm_extcon_dev_allocate(dev, supported_cable);
+ if (IS_ERR(edev))
+ return PTR_ERR(edev);
+
+ ret = devm_extcon_dev_register(dev, edev);
+ if (ret)
+ return ret;
+
+ extcon_set_cable_state_(edev, EXTCON_USB, true);
+ }
+#endif
return 0;
}