}
static void
-intel_modeset_check_disabled(struct drm_device *dev,
- struct drm_atomic_state *old_state)
+intel_modeset_check_disabled(struct drm_device *dev)
{
check_encoder_state(dev);
check_connector_state(dev, NULL);
check_disabled_dpll_state(dev);
}
-static void
-intel_modeset_check_state(struct drm_device *dev,
- struct drm_atomic_state *old_state)
-{
- struct drm_crtc_state *old_crtc_state;
- struct drm_crtc *crtc;
- int i;
-
- for_each_crtc_in_state(old_state, crtc, old_crtc_state, i)
- intel_modeset_check_crtc(crtc, old_crtc_state, crtc->state);
-
- intel_modeset_check_disabled(dev, old_state);
-}
-
static void update_scanline_offset(struct intel_crtc *crtc)
{
struct drm_device *dev = crtc->base.dev;
if (dev_priv->display.modeset_commit_cdclk &&
intel_state->dev_cdclk != dev_priv->cdclk_freq)
dev_priv->display.modeset_commit_cdclk(state);
+
+ intel_modeset_check_disabled(dev);
}
/* Now enable the clocks, plane, pipe, and connectors that we set up. */
if (put_domains[i])
modeset_put_power_domains(dev_priv, put_domains[i]);
+
+ intel_modeset_check_crtc(crtc, old_crtc_state, crtc->state);
}
if (intel_state->modeset)
drm_atomic_helper_cleanup_planes(dev, state);
mutex_unlock(&dev->struct_mutex);
- if (hw_check)
- intel_modeset_check_state(dev, state);
-
drm_atomic_state_free(state);
/* As one of the primary mmio accessors, KMS has a high likelihood