drm/amd/powerplay: correct the APIs' naming

'UVD' is a HW engine name for Vega20 and before ASICs.
For newer ASICs, the similar engine is named as 'VCN'.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index 8ea100b3187b0426c81f7acfaf7995a1aa5544bf..b84eabfc1976c6294d995b7bcce6156d1c68e491 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -455,10 +455,15 @@ int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,
                return -EOPNOTSUPP;
 
        switch (block_type) {
+       /*
+        * Some legacy code of amdgpu_vcn.c and vcn_v2*.c still uses
+        * AMD_IP_BLOCK_TYPE_UVD for VCN. So, here both of them are kept.
+        */
        case AMD_IP_BLOCK_TYPE_UVD:
-               ret = smu_dpm_set_uvd_enable(smu, !gate);
+       case AMD_IP_BLOCK_TYPE_VCN:
+               ret = smu_dpm_set_vcn_enable(smu, !gate);
                if (ret)
-                       dev_err(smu->adev->dev, "Failed to power %s UVD!\n",
+                       dev_err(smu->adev->dev, "Failed to power %s VCN!\n",
                                gate ? "gate" : "ungate");
                break;
        case AMD_IP_BLOCK_TYPE_GFX:
@@ -1328,7 +1333,7 @@ static int smu_hw_init(void *handle)
 
        if (smu->is_apu) {
                smu_powergate_sdma(&adev->smu, false);
-               smu_dpm_set_uvd_enable(smu, true);
+               smu_dpm_set_vcn_enable(smu, true);
                smu_dpm_set_jpeg_enable(smu, true);
                smu_set_gfx_cgpg(&adev->smu, true);
        }
@@ -1460,7 +1465,7 @@ static int smu_hw_fini(void *handle)
 
        if (smu->is_apu) {
                smu_powergate_sdma(&adev->smu, true);
-               smu_dpm_set_uvd_enable(smu, false);
+               smu_dpm_set_vcn_enable(smu, false);
                smu_dpm_set_jpeg_enable(smu, false);
        }
 

diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
index 9f3dfc3cc28e9637d5ef40f7e39d1216ceafafcb..eb213504c6c58762c6915d1ac5fda22b9bf07ad7 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
@@ -2118,7 +2118,7 @@ static bool arcturus_is_dpm_running(struct smu_context *smu)
        return !!(feature_enabled & SMC_DPM_FEATURE);
 }
 
-static int arcturus_dpm_set_uvd_enable(struct smu_context *smu, bool enable)
+static int arcturus_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
 {
        struct smu_power_context *smu_power = &smu->smu_power;
        struct smu_power_gate *power_gate = &smu_power->power_gate;
@@ -2617,7 +2617,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
        .dump_pptable = arcturus_dump_pptable,
        .get_power_limit = arcturus_get_power_limit,
        .is_dpm_running = arcturus_is_dpm_running,
-       .dpm_set_uvd_enable = arcturus_dpm_set_uvd_enable,
+       .dpm_set_vcn_enable = arcturus_dpm_set_vcn_enable,
        .i2c_eeprom_init = arcturus_i2c_eeprom_control_init,
        .i2c_eeprom_fini = arcturus_i2c_eeprom_control_fini,
        .get_unique_id = arcturus_get_unique_id,

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index 08e82954b8992011942443ad1f8d7ee33d9a0fec..91e29444134fa96174df55a82be0ca74542027b0 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -453,7 +453,7 @@ struct pptable_funcs {
                                              *clocks);
        int (*get_power_profile_mode)(struct smu_context *smu, char *buf);
        int (*set_power_profile_mode)(struct smu_context *smu, long *input, uint32_t size);
-       int (*dpm_set_uvd_enable)(struct smu_context *smu, bool enable);
+       int (*dpm_set_vcn_enable)(struct smu_context *smu, bool enable);
        int (*dpm_set_jpeg_enable)(struct smu_context *smu, bool enable);
        int (*read_sensor)(struct smu_context *smu, enum amd_pp_sensors sensor,
                           void *data, uint32_t *size);

diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index 570d8b186cfa7a766fe204c5ccf4901d416072c4..9095602bfb6a39b3ddd492adf3f71288e074d1cc 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -729,7 +729,7 @@ static int navi10_set_default_dpm_table(struct smu_context *smu)
        return 0;
 }
 
-static int navi10_dpm_set_uvd_enable(struct smu_context *smu, bool enable)
+static int navi10_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
 {
        struct smu_power_context *smu_power = &smu->smu_power;
        struct smu_power_gate *power_gate = &smu_power->power_gate;
@@ -2429,7 +2429,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
        .get_workload_type = navi10_get_workload_type,
        .get_allowed_feature_mask = navi10_get_allowed_feature_mask,
        .set_default_dpm_table = navi10_set_default_dpm_table,
-       .dpm_set_uvd_enable = navi10_dpm_set_uvd_enable,
+       .dpm_set_vcn_enable = navi10_dpm_set_vcn_enable,
        .dpm_set_jpeg_enable = navi10_dpm_set_jpeg_enable,
        .get_current_clk_freq_by_table = navi10_get_current_clk_freq_by_table,
        .print_clk_levels = navi10_print_clk_levels,

diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
index 7a4e1bd9bafd28385a69f06950db454be97e17a2..6b5e60b4c039a3e2ba48465c2a82dc7ace17b50c 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
@@ -349,7 +349,7 @@ static enum amd_pm_state_type renoir_get_current_power_state(struct smu_context
        return pm_type;
 }
 
-static int renoir_dpm_set_uvd_enable(struct smu_context *smu, bool enable)
+static int renoir_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
 {
        struct smu_power_context *smu_power = &smu->smu_power;
        struct smu_power_gate *power_gate = &smu_power->power_gate;
@@ -929,7 +929,7 @@ static const struct pptable_funcs renoir_ppt_funcs = {
        .get_dpm_clk_limited = renoir_get_dpm_clk_limited,
        .print_clk_levels = renoir_print_clk_levels,
        .get_current_power_state = renoir_get_current_power_state,
-       .dpm_set_uvd_enable = renoir_dpm_set_uvd_enable,
+       .dpm_set_vcn_enable = renoir_dpm_set_vcn_enable,
        .dpm_set_jpeg_enable = renoir_dpm_set_jpeg_enable,
        .get_current_clk_freq_by_table = renoir_get_current_clk_freq_by_table,
        .force_dpm_limit_value = renoir_force_dpm_limit_value,

diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
index 5110660b14bfb89a8c82ebb388250ca9564bee80..d1018122e47446bc36985860ad6d4fe8e2965933 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
@@ -722,7 +722,7 @@ static int sienna_cichlid_set_default_dpm_table(struct smu_context *smu)
        return 0;
 }
 
-static int sienna_cichlid_dpm_set_uvd_enable(struct smu_context *smu, bool enable)
+static int sienna_cichlid_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
 {
        struct smu_power_context *smu_power = &smu->smu_power;
        struct smu_power_gate *power_gate = &smu_power->power_gate;
@@ -2602,7 +2602,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
        .get_workload_type = sienna_cichlid_get_workload_type,
        .get_allowed_feature_mask = sienna_cichlid_get_allowed_feature_mask,
        .set_default_dpm_table = sienna_cichlid_set_default_dpm_table,
-       .dpm_set_uvd_enable = sienna_cichlid_dpm_set_uvd_enable,
+       .dpm_set_vcn_enable = sienna_cichlid_dpm_set_vcn_enable,
        .dpm_set_jpeg_enable = sienna_cichlid_dpm_set_jpeg_enable,
        .get_current_clk_freq_by_table = sienna_cichlid_get_current_clk_freq_by_table,
        .print_clk_levels = sienna_cichlid_print_clk_levels,

diff --git a/drivers/gpu/drm/amd/powerplay/smu_internal.h b/drivers/gpu/drm/amd/powerplay/smu_internal.h
index fea8e4d5f431196ca8a6c4ffddf0301f24c17c20..9c68c6c43f9d8083b24f80a5b16706138ad780e1 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_internal.h
+++ b/drivers/gpu/drm/amd/powerplay/smu_internal.h
@@ -157,8 +157,8 @@ static inline int smu_send_smc_msg(struct smu_context *smu, enum smu_message_typ
 #define smu_get_current_shallow_sleep_clocks(smu, clocks) \
        ((smu)->ppt_funcs->get_current_shallow_sleep_clocks ? (smu)->ppt_funcs->get_current_shallow_sleep_clocks((smu), (clocks)) : 0)
 
-#define smu_dpm_set_uvd_enable(smu, enable) \
-       ((smu)->ppt_funcs->dpm_set_uvd_enable ? (smu)->ppt_funcs->dpm_set_uvd_enable((smu), (enable)) : 0)
+#define smu_dpm_set_vcn_enable(smu, enable) \
+       ((smu)->ppt_funcs->dpm_set_vcn_enable ? (smu)->ppt_funcs->dpm_set_vcn_enable((smu), (enable)) : 0)
 #define smu_dpm_set_jpeg_enable(smu, enable) \
        ((smu)->ppt_funcs->dpm_set_jpeg_enable ? (smu)->ppt_funcs->dpm_set_jpeg_enable((smu), (enable)) : 0)