Fix Register selection refactor bugs
authorCarol Eidt <carol.eidt@microsoft.com>
Fri, 20 Oct 2017 18:31:12 +0000 (11:31 -0700)
committerCarol Eidt <carol.eidt@microsoft.com>
Fri, 20 Oct 2017 18:31:12 +0000 (11:31 -0700)
Fix #14617
Fix #14618

src/jit/lsra.cpp

index 41184f8db8547ce0dfe18d9cb101e86ce4730461..fcdf35dace34e78d251ab280246616740c9c9408 100644 (file)
@@ -6357,7 +6357,7 @@ regNumber LinearScan::allocateBusyReg(Interval* current, RefPosition* refPositio
             }
         }
         else
-#else
+#endif
         {
             recentAssignedRef = assignedInterval->recentRefPosition;
             if (!canSpillReg(physRegRecord, refLocation, &recentAssignedRefWeight))
@@ -6365,8 +6365,7 @@ regNumber LinearScan::allocateBusyReg(Interval* current, RefPosition* refPositio
                 continue;
             }
         }
-#endif
-            if (recentAssignedRefWeight > farthestRefPosWeight)
+        if (recentAssignedRefWeight > farthestRefPosWeight)
         {
             continue;
         }
@@ -6949,9 +6948,11 @@ void LinearScan::unassignPhysReg(RegRecord* regRec, RefPosition* spillRefPositio
 {
     Interval* assignedInterval = regRec->assignedInterval;
     assert(assignedInterval != nullptr);
-
     regNumber thisRegNum = regRec->regNum;
 
+    // Is assignedInterval actually still assigned to this register?
+    bool intervalIsAssigned = (assignedInterval->physReg == thisRegNum);
+
 #ifdef _TARGET_ARM_
     RegRecord* anotherRegRec = nullptr;
 
@@ -6964,6 +6965,10 @@ void LinearScan::unassignPhysReg(RegRecord* regRec, RefPosition* spillRefPositio
 
         // Both two RegRecords should have been assigned to the same interval.
         assert(assignedInterval == anotherRegRec->assignedInterval);
+        if (!intervalIsAssigned && (assignedInterval->physReg == anotherRegRec->regNum))
+        {
+            intervalIsAssigned = true;
+        }
     }
 #endif // _TARGET_ARM_
 
@@ -6993,7 +6998,7 @@ void LinearScan::unassignPhysReg(RegRecord* regRec, RefPosition* spillRefPositio
         nextRefPosition = spillRefPosition->nextRefPosition;
     }
 
-    if (assignedInterval->physReg != REG_NA && assignedInterval->physReg != thisRegNum)
+    if (!intervalIsAssigned && assignedInterval->physReg != REG_NA)
     {
         // This must have been a temporary copy reg, but we can't assert that because there
         // may have been intervening RefPositions that were not copyRegs.