#define MCFSIM_ICR_TIMER1 (0xFC048040+32)
#define MCFSIM_ICR_TIMER2 (0xFC048040+33)
+/*
+ * Define system peripheral IRQ usage.
+ */
+#define MCF_IRQ_TIMER (64 + 32) /* Timer0 */
+#define MCF_IRQ_PROFILER (64 + 33) /* Timer1 */
/*
* Define the Cache register flags.
/***************************************************************************/
-extern unsigned int mcf_timervector;
-extern unsigned int mcf_profilevector;
-extern unsigned int mcf_timerlevel;
-
-/***************************************************************************/
-
static struct mcf_platform_uart m532x_uart_platform[] = {
{
.mapbase = MCFUART_BASE1,
.num_resources = ARRAY_SIZE(m532x_fec_resources),
.resource = m532x_fec_resources,
};
+
static struct platform_device *m532x_devices[] __initdata = {
&m532x_uart,
&m532x_fec,
/***************************************************************************/
-void mcf_settimericr(unsigned int timer, unsigned int level)
-{
-}
-
-/***************************************************************************/
-
static void m532x_cpu_reset(void)
{
local_irq_disable();
}
#endif
- mcf_timervector = 64+32;
- mcf_profilevector = 64+33;
- mach_reset = m532x_cpu_reset;
-
#ifdef CONFIG_BDM_DISABLE
/*
* Disable the BDM clocking. This also turns off most of the rest of