arm64: dts: renesas: r9a07g054: Add TSU node

Add TSU and thermal-zones nodes to RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220308223324.7456-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index bdf0a10..f35aa03 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -589,6 +589,16 @@
                        };
                };
 
+               tsu: thermal@10059400 {
+                       compatible = "renesas,r9a07g054-tsu",
+                                    "renesas,rzg2l-tsu";
+                       reg = <0 0x10059400 0 0x400>;
+                       clocks = <&cpg CPG_MOD R9A07G054_TSU_PCLK>;
+                       resets = <&cpg R9A07G054_TSU_PRESETN>;
+                       power-domains = <&cpg>;
+                       #thermal-sensor-cells = <1>;
+               };
+
                sbc: spi@10060000 {
                        compatible = "renesas,r9a07g054-rpc-if",
                                     "renesas,rzg2l-rpc-if";
@@ -974,6 +984,37 @@
                };
        };
 
+       thermal-zones {
+               cpu-thermal {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+                       thermal-sensors = <&tsu 0>;
+                       sustainable-power = <717>;
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&target>;
+                                       cooling-device = <&cpu0 0 2>;
+                                       contribution = <1024>;
+                               };
+                       };
+
+                       trips {
+                               sensor_crit: sensor-crit {
+                                       temperature = <125000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+
+                               target: trip-point {
+                                       temperature = <100000>;
+                                       hysteresis = <1000>;
+                                       type = "passive";
+                               };
+                       };
+               };
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,