ARM: dts: r9a06g032: Fill the UART DMA properties

UART 0 to 2 do not have DMA support, while UART 3 to 7 do.

Fill the "dmas" and "dma-names" properties for each of these nodes.

Please mind that these nodes go through the dmamux node which will
redirect the requests to the right DMA controller. The first 4 cells of
the "dmas" properties will be transferred as-is to the DMA
controllers. The last 2 cells are consumed by the dmamux. Which means
cell 0 and 4 are almost redundant, one giving the controller request ID
and the other the dmamux channel which is a 1:1 translation of the
request IDs, shifted by 16 when pointing to the second DMA controller.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20220421095323.101811-11-miquel.raynal@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi
index a84efde..6b6944b 100644 (file)
--- a/arch/arm/boot/dts/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/r9a06g032.dtsi
@@ -145,6 +145,8 @@
                        reg-io-width = <4>;
                        clocks = <&sysctrl R9A06G032_CLK_UART3>, <&sysctrl R9A06G032_HCLK_UART3>;
                        clock-names = "baudclk", "apb_pclk";
+                       dmas =  <&dmamux 0 0 0 0 0 1>, <&dmamux 1 0 0 0 1 1>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
@@ -156,6 +158,8 @@
                        reg-io-width = <4>;
                        clocks = <&sysctrl R9A06G032_CLK_UART4>, <&sysctrl R9A06G032_HCLK_UART4>;
                        clock-names = "baudclk", "apb_pclk";
+                       dmas =  <&dmamux 2 0 0 0 2 1>, <&dmamux 3 0 0 0 3 1>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
@@ -167,6 +171,8 @@
                        reg-io-width = <4>;
                        clocks = <&sysctrl R9A06G032_CLK_UART5>, <&sysctrl R9A06G032_HCLK_UART5>;
                        clock-names = "baudclk", "apb_pclk";
+                       dmas =  <&dmamux 4 0 0 0 4 1>, <&dmamux 5 0 0 0 5 1>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
@@ -178,6 +184,8 @@
                        reg-io-width = <4>;
                        clocks = <&sysctrl R9A06G032_CLK_UART6>, <&sysctrl R9A06G032_HCLK_UART6>;
                        clock-names = "baudclk", "apb_pclk";
+                       dmas =  <&dmamux 6 0 0 0 6 1>, <&dmamux 7 0 0 0 7 1>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
@@ -189,6 +197,8 @@
                        reg-io-width = <4>;
                        clocks = <&sysctrl R9A06G032_CLK_UART7>, <&sysctrl R9A06G032_HCLK_UART7>;
                        clock-names = "baudclk", "apb_pclk";
+                       dmas =  <&dmamux 4 0 0 0 20 1>, <&dmamux 5 0 0 0 21 1>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };