const struct anv_image_view *iview =
fb->attachments[subpass->depth_stencil_attachment];
- assert(anv_format_is_depth_or_stencil(iview->format));
+ assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT |
+ VK_IMAGE_ASPECT_STENCIL_BIT));
return iview;
}
image->levels = pCreateInfo->mipLevels;
image->array_size = pCreateInfo->arrayLayers;
image->usage = anv_image_get_full_usage(pCreateInfo);
+ image->tiling = pCreateInfo->tiling;
if (image->usage & VK_IMAGE_USAGE_SAMPLED_BIT) {
image->needs_nonrt_surface_state = true;
iview->offset = image->offset + surface->offset;
iview->aspect_mask = pCreateInfo->subresourceRange.aspectMask;
- iview->format = anv_format_for_vk_format(pCreateInfo->format);
+ iview->vk_format = pCreateInfo->format;
+ iview->format = anv_get_isl_format(pCreateInfo->format, iview->aspect_mask,
+ image->tiling);
iview->extent = (VkExtent3D) {
.width = anv_minify(image->extent.width, range->baseMipLevel),
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
.attachmentCount = 1,
.pAttachments = &(VkAttachmentDescription) {
- .format = iview.format->vk_format,
+ .format = iview.vk_format,
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
.initialLayout = VK_IMAGE_LAYOUT_GENERAL,
uint32_t levels;
uint32_t array_size;
VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
+ VkImageTiling tiling; /** VkImageCreateInfo::tiling */
VkDeviceSize size;
uint32_t alignment;
struct anv_image_view {
const struct anv_image *image; /**< VkImageViewCreateInfo::image */
- const struct anv_format *format; /**< VkImageViewCreateInfo::format */
struct anv_bo *bo;
uint32_t offset; /**< Offset into bo. */
VkImageAspectFlags aspect_mask;
+ VkFormat vk_format;
+ enum isl_format format;
VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
/** RENDER_SURFACE_STATE when using image as a color render target. */
anv_cmd_buffer_get_depth_stencil_view(cmd_buffer);
struct GEN7_DEPTH_STENCIL_STATE depth_stencil = {
- .StencilBufferWriteEnable = iview && iview->format->has_stencil,
+ .StencilBufferWriteEnable = iview && (iview->aspect_mask & VK_IMAGE_ASPECT_STENCIL_BIT),
.StencilTestMask =
cmd_buffer->state.dynamic.stencil_compare_mask.front & 0xff,
const struct anv_image_view *iview =
anv_cmd_buffer_get_depth_stencil_view(cmd_buffer);
const struct anv_image *image = iview ? iview->image : NULL;
- const bool has_depth = iview && iview->format->depth_format;
- const bool has_stencil = iview && iview->format->has_stencil;
+
+ /* XXX: isl needs to grow depth format support */
+ const struct anv_format *anv_format =
+ iview ? anv_format_for_vk_format(iview->vk_format) : NULL;
+
+ const bool has_depth = iview && anv_format->depth_format;
+ const bool has_stencil = iview && anv_format->has_stencil;
/* Emit 3DSTATE_DEPTH_BUFFER */
if (has_depth) {
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BUFFER),
.SurfaceType = SURFTYPE_2D,
- .DepthWriteEnable = iview->format->depth_format,
+ .DepthWriteEnable = true,
.StencilWriteEnable = has_stencil,
.HierarchicalDepthBufferEnable = false,
- .SurfaceFormat = iview->format->depth_format,
+ .SurfaceFormat = anv_format->depth_format,
.SurfacePitch = image->depth_surface.isl.row_pitch - 1,
.SurfaceBaseAddress = {
.bo = image->bo,
struct GENX(RENDER_SURFACE_STATE) surface_state = {
.SurfaceType = anv_surftype(image, pCreateInfo->viewType, false),
.SurfaceArray = image->array_size > 1,
- .SurfaceFormat = iview->format->surface_format,
+ .SurfaceFormat = iview->format,
.SurfaceVerticalAlignment = anv_valign[image_align_sa.height],
.SurfaceHorizontalAlignment = anv_halign[image_align_sa.width],
anv_surftype(image, pCreateInfo->viewType, true),
surface_state.SurfaceFormat =
- isl_lower_storage_image_format(&device->isl_dev,
- iview->format->surface_format);
+ isl_lower_storage_image_format(&device->isl_dev, iview->format);
surface_state.SurfaceMinLOD = range->baseMipLevel;
surface_state.MIPCountLOD = MAX2(range->levelCount, 1) - 1;
const struct anv_image_view *iview =
anv_cmd_buffer_get_depth_stencil_view(cmd_buffer);
const struct anv_image *image = iview ? iview->image : NULL;
- const bool has_depth = iview && iview->format->depth_format;
- const bool has_stencil = iview && iview->format->has_stencil;
+
+ /* XXX: isl needs to grow depth format support */
+ const struct anv_format *anv_format =
+ iview ? anv_format_for_vk_format(iview->vk_format) : NULL;
+
+ const bool has_depth = iview && anv_format->depth_format;
+ const bool has_stencil = iview && anv_format->has_stencil;
/* FIXME: Implement the PMA stall W/A */
/* FIXME: Width and Height are wrong */
if (has_depth) {
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BUFFER),
.SurfaceType = SURFTYPE_2D,
- .DepthWriteEnable = iview->format->depth_format,
+ .DepthWriteEnable = anv_format->depth_format,
.StencilWriteEnable = has_stencil,
.HierarchicalDepthBufferEnable = false,
- .SurfaceFormat = iview->format->depth_format,
+ .SurfaceFormat = anv_format->depth_format,
.SurfacePitch = image->depth_surface.isl.row_pitch - 1,
.SurfaceBaseAddress = {
.bo = image->bo,
struct GENX(RENDER_SURFACE_STATE) surface_state = {
.SurfaceType = anv_surftype(image, pCreateInfo->viewType, false),
.SurfaceArray = image->array_size > 1,
- .SurfaceFormat = iview->format->surface_format,
+ .SurfaceFormat = iview->format,
.SurfaceVerticalAlignment = valign,
.SurfaceHorizontalAlignment = halign,
.TileMode = isl_to_gen_tiling[surface->isl.tiling],
anv_surftype(image, pCreateInfo->viewType, true),
surface_state.SurfaceFormat =
- isl_lower_storage_image_format(&device->isl_dev,
- iview->format->surface_format);
+ isl_lower_storage_image_format(&device->isl_dev, iview->format);
surface_state.SurfaceMinLOD = range->baseMipLevel;
surface_state.MIPCountLOD = MAX2(range->levelCount, 1) - 1;