* i386.c, i386.h, i386.md: Change gen_rtx (X, ...) to gen_rtx_X (...).
Use GEN_INT instead of gen_rtx (CONST_INT). Make printf arguments
and format string match.
From-SVN: r17840
+Wed Feb 11 01:23:03 1998 John F. Carr <jfc@mit.edu>
+
+ * i386.c, i386.h, i386.md: Change gen_rtx (X, ...) to gen_rtx_X (...).
+ Use GEN_INT instead of gen_rtx (CONST_INT). Make printf arguments
+ and format string match.
+
Wed Feb 11 01:17:39 1998 Jeffrey A Law (law@cygnus.com)
* flow.c (life_analysis): Do not conside the stack pointer live at
struct processor_costs *ix86_cost = &pentium_cost;
-#define AT_BP(mode) (gen_rtx (MEM, (mode), frame_pointer_rtx))
+#define AT_BP(mode) (gen_rtx_MEM ((mode), frame_pointer_rtx))
extern FILE *asm_out_file;
extern char *strcat ();
case HImode:
case QImode:
if (words <= cum->nregs)
- ret = gen_rtx (REG, mode, cum->regno);
+ ret = gen_rtx_REG (mode, cum->regno);
break;
}
if (size > 2 * UNITS_PER_WORD)
{
- high = gen_rtx (REG, SImode, REGNO (src) + 2);
+ high = gen_rtx_REG (SImode, REGNO (src) + 2);
output_asm_insn (AS1 (push%L0,%0), &high);
}
- high = gen_rtx (REG, SImode, REGNO (src) + 1);
+ high = gen_rtx_REG (SImode, REGNO (src) + 1);
output_asm_insn (AS1 (push%L0,%0), &high);
}
if (size > UNITS_PER_WORD)
{
- dest = gen_rtx (REG, SImode, REGNO (dest) + 1);
+ dest = gen_rtx_REG (SImode, REGNO (dest) + 1);
if (! scratch_mem)
output_asm_insn (AS1 (pop%L0,%0), &dest);
else
if (size > 2 * UNITS_PER_WORD)
{
- dest = gen_rtx (REG, SImode, REGNO (dest) + 1);
+ dest = gen_rtx_REG (SImode, REGNO (dest) + 1);
if (! scratch_mem)
output_asm_insn (AS1 (pop%L0,%0), &dest);
else
operands[0] = XEXP (XEXP (operands[0], 0), 0);
asm_add (-size, operands[0]);
if (GET_MODE (operands[1]) == XFmode)
- operands[0] = gen_rtx (MEM, XFmode, operands[0]);
+ operands[0] = gen_rtx_MEM (XFmode, operands[0]);
else if (GET_MODE (operands[0]) == DFmode)
- operands[0] = gen_rtx (MEM, DFmode, operands[0]);
+ operands[0] = gen_rtx_MEM (DFmode, operands[0]);
else
- operands[0] = gen_rtx (MEM, DImode, operands[0]);
+ operands[0] = gen_rtx_MEM (DImode, operands[0]);
optype0 = OFFSOP;
}
operands[1] = XEXP (XEXP (operands[1], 0), 0);
asm_add (-size, operands[1]);
if (GET_MODE (operands[1]) == XFmode)
- operands[1] = gen_rtx (MEM, XFmode, operands[1]);
+ operands[1] = gen_rtx_MEM (XFmode, operands[1]);
else if (GET_MODE (operands[1]) == DFmode)
- operands[1] = gen_rtx (MEM, DFmode, operands[1]);
+ operands[1] = gen_rtx_MEM (DFmode, operands[1]);
else
- operands[1] = gen_rtx (MEM, DImode, operands[1]);
+ operands[1] = gen_rtx_MEM (DImode, operands[1]);
optype1 = OFFSOP;
}
{
if (optype0 == REGOP)
{
- middlehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
- latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 2);
+ middlehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
+ latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2);
}
else if (optype0 == OFFSOP)
{
if (optype1 == REGOP)
{
- middlehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
- latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2);
+ middlehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
+ latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2);
}
else if (optype1 == OFFSOP)
{
/* Size is not 12. */
if (optype0 == REGOP)
- latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
+ latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
latehalf[0] = adj_offsettable_operand (operands[0], 4);
else
latehalf[0] = operands[0];
if (optype1 == REGOP)
- latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
+ latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
latehalf[1] = adj_offsettable_operand (operands[1], 4);
else if (optype1 == CNSTOP)
output_asm_insn (AS2 (lea%L0,%a1,%0), xops);
if (GET_MODE (operands[1]) == XFmode)
{
- operands[1] = gen_rtx (MEM, XFmode, latehalf[0]);
+ operands[1] = gen_rtx_MEM (XFmode, latehalf[0]);
middlehalf[1] = adj_offsettable_operand (operands[1], size-8);
latehalf[1] = adj_offsettable_operand (operands[1], size-4);
}
else
{
- operands[1] = gen_rtx (MEM, DImode, latehalf[0]);
+ operands[1] = gen_rtx_MEM (DImode, latehalf[0]);
latehalf[1] = adj_offsettable_operand (operands[1], size-4);
}
}
LABEL_NAME (pic_label_rtx) = pic_label_name;
}
- xops[1] = gen_rtx (MEM, QImode,
+ xops[1] = gen_rtx_MEM (QImode,
gen_rtx (SYMBOL_REF, Pmode,
LABEL_NAME (pic_label_rtx)));
if (do_rtl)
{
insn = emit_insn (gen_rtx (SET, VOIDmode,
- gen_rtx (MEM, SImode,
+ gen_rtx_MEM (SImode,
gen_rtx (PRE_DEC, SImode,
stack_pointer_rtx)),
frame_pointer_rtx));
}
else
{
- xops[3] = gen_rtx (REG, SImode, 0);
+ xops[3] = gen_rtx_REG (SImode, 0);
if (do_rtl)
emit_move_insn (xops[3], xops[2]);
else
output_asm_insn (AS2 (mov%L0,%2,%3), xops);
- xops[3] = gen_rtx (MEM, FUNCTION_MODE,
+ xops[3] = gen_rtx_MEM (FUNCTION_MODE,
gen_rtx (SYMBOL_REF, Pmode, "_alloca"));
if (do_rtl)
if ((regs_ever_live[regno] && ! call_used_regs[regno])
|| (regno == PIC_OFFSET_TABLE_REGNUM && pic_reg_used))
{
- xops[0] = gen_rtx (REG, SImode, regno);
+ xops[0] = gen_rtx_REG (SImode, regno);
if (do_rtl)
{
insn = emit_insn (gen_rtx (SET, VOIDmode,
- gen_rtx (MEM, SImode,
+ gen_rtx_MEM (SImode,
gen_rtx (PRE_DEC, SImode,
stack_pointer_rtx)),
xops[0]));
if ((regs_ever_live[regno] && ! call_used_regs[regno])
|| (regno == PIC_OFFSET_TABLE_REGNUM && pic_reg_used))
{
- xops[0] = gen_rtx (REG, SImode, regno);
+ xops[0] = gen_rtx_REG (SImode, regno);
if (do_rtl)
emit_insn (gen_pop (xops[0]));
if ((regs_ever_live[regno] && ! call_used_regs[regno])
|| (regno == PIC_OFFSET_TABLE_REGNUM && pic_reg_used))
{
- xops[0] = gen_rtx (REG, SImode, regno);
+ xops[0] = gen_rtx_REG (SImode, regno);
xops[1] = adj_offsettable_operand (AT_BP (Pmode), offset);
if (do_rtl)
if (current_function_pops_args >= 32768)
{
/* ??? Which register to use here? */
- xops[0] = gen_rtx (REG, SImode, 2);
+ xops[0] = gen_rtx_REG (SImode, 2);
if (do_rtl)
{
|| GET_CODE (addr) == LABEL_REF)
new = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, orig);
else
- new = gen_rtx (MEM, Pmode,
+ new = gen_rtx_MEM (Pmode,
gen_rtx (PLUS, Pmode, pic_offset_table_rtx, orig));
emit_move_insn (reg, new);
break;
case CONST_INT:
- fprintf (file, "%d", INTVAL (x));
+ fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
break;
case CONST:
{
/* We can use %d if the number is <32 bits and positive. */
if (CONST_DOUBLE_HIGH (x) || CONST_DOUBLE_LOW (x) < 0)
- fprintf (file, "0x%x%08x",
- CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
+ fprintf (file, "0x%lx%08lx",
+ (unsigned long) CONST_DOUBLE_HIGH (x),
+ (unsigned long) CONST_DOUBLE_LOW (x));
else
- fprintf (file, "%d", CONST_DOUBLE_LOW (x));
+ fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
}
else
/* We can't handle floating point constants;
if (GET_CODE (addr) == CONST_INT
&& INTVAL (addr) < 0x8000
&& INTVAL (addr) >= -0x8000)
- fprintf (file, "%d", INTVAL (addr));
+ fprintf (file, "%d", (int) INTVAL (addr));
else
{
if (flag_pic)
{
if (GET_CODE (operands[num]) == REG)
{
- lo_half[num] = gen_rtx (REG, SImode, REGNO (operands[num]));
- hi_half[num] = gen_rtx (REG, SImode, REGNO (operands[num]) + 1);
+ lo_half[num] = gen_rtx_REG (SImode, REGNO (operands[num]));
+ hi_half[num] = gen_rtx_REG (SImode, REGNO (operands[num]) + 1);
}
else if (CONSTANT_P (operands[num]))
split_double (operands[num], &lo_half[num], &hi_half[num]);
rtx next;
enum rtx_code code;
- xops[0] = gen_rtx (REG, HImode, 0);
+ xops[0] = gen_rtx_REG (HImode, 0);
output_asm_insn (AS1 (fnsts%W0,%0), xops);
if (! TARGET_IEEE_FP)
else
abort ();
- xops[0] = gen_rtx (REG, QImode, 0);
+ xops[0] = gen_rtx_REG (QImode, 0);
switch (code)
{
output_asm_insn (AS1 (je,%l8), xops);
}
- xops[13] = gen_rtx (MEM, QImode, xops[0]);
+ xops[13] = gen_rtx_MEM (QImode, xops[0]);
/* Now compare the bytes; compare with the high part of a q-reg
gives shorter code. */
speed up. */
ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", CODE_LABEL_NUMBER (xops[8]));
- xops[13] = gen_rtx (MEM, SImode, xops[0]);
+ xops[13] = gen_rtx_MEM (SImode, xops[0]);
output_asm_insn (AS2 (mov%L1,%13,%1), xops);
if (QI_REG_P (xops[1]))
If the precise function being called is known, FUNC is its FUNCTION_DECL;
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
- gen_rtx (REG, TYPE_MODE (VALTYPE), \
+ gen_rtx_REG (TYPE_MODE (VALTYPE), \
VALUE_REGNO (TYPE_MODE (VALTYPE)))
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) \
- gen_rtx (REG, MODE, VALUE_REGNO (MODE))
+ gen_rtx_REG (MODE, VALUE_REGNO (MODE))
/* Define the size of the result block used for communication between
untyped_call and untyped_return. The block contains a DImode value
\
ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
\
- xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
+ xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \
xops[5] = stack_pointer_rtx; \
- xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
+ xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \
\
CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
\
case 2: \
\
xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \
- xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_trace_func")); \
+ xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_trace_func")); \
xops[6] = GEN_INT (8); \
\
output_asm_insn (AS1(push%L2,%2), xops); \
ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
\
xops[0] = const0_rtx; \
- xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \
- xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \
- xops[4] = gen_rtx (MEM, Pmode, xops[1]); \
+ xops[2] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, false_label)); \
+ xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_func")); \
+ xops[4] = gen_rtx_MEM (Pmode, xops[1]); \
xops[6] = GEN_INT (4); \
\
CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
\
ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
\
- xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
+ xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \
xops[2] = GEN_INT ((BLOCKNO)); \
- xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_func")); \
- xops[4] = gen_rtx (SYMBOL_REF, VOIDmode, "__bb"); \
+ xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_func")); \
+ xops[4] = gen_rtx_SYMBOL_REF (VOIDmode, "__bb"); \
xops[5] = plus_constant (xops[4], 4); \
- xops[0] = gen_rtx (MEM, SImode, xops[4]); \
- xops[6] = gen_rtx (MEM, SImode, xops[5]); \
+ xops[0] = gen_rtx_MEM (SImode, xops[4]); \
+ xops[6] = gen_rtx_MEM (SImode, xops[5]); \
\
CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
\
output_asm_insn (AS2(mov%L0,%2,%0), xops); \
if (flag_pic) \
{ \
- xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
+ xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \
output_asm_insn (AS1(push%L7,%7), xops); \
output_asm_insn (AS2(lea%L7,%a1,%7), xops); \
output_asm_insn (AS2(mov%L6,%7,%6), xops); \
default: \
\
ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
- cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \
+ cnt_rtx = gen_rtx_SYMBOL_REF (VOIDmode, counts); \
SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
\
if (BLOCKNO) \
cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
\
if (flag_pic) \
- cnt_rtx = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, cnt_rtx); \
+ cnt_rtx = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, cnt_rtx); \
\
- xops[0] = gen_rtx (MEM, SImode, cnt_rtx); \
+ xops[0] = gen_rtx_MEM (SImode, cnt_rtx); \
output_asm_insn (AS1(inc%L0,%0), xops); \
\
break; \
{ \
rtx xops[1]; \
\
- xops[0] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_ret")); \
+ xops[0] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_ret")); \
\
output_asm_insn (AS1(call,%P0), xops); \
\
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
- emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 1)), CXT); \
+ emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 6)), FNADDR); \
}
\f
/* Definitions for register eliminations.
/* Before the prologue, RA is at 0(%esp). */
#define INCOMING_RETURN_ADDR_RTX \
- gen_rtx (MEM, VOIDmode, gen_rtx (REG, VOIDmode, STACK_POINTER_REGNUM))
+ gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
/* After the prologue, RA is at -4(AP) in the current frame. */
#define RETURN_ADDR_RTX(COUNT, FRAME) \
((COUNT) == 0 \
- ? gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, arg_pointer_rtx, GEN_INT(-4)))\
- : gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, (FRAME), GEN_INT(4))))
+ ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT(-4)))\
+ : gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4))))
/* PC is dbx register 8; let's use that column for RA. */
#define DWARF_FRAME_RETURN_COLUMN 8
#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
do { long l[2]; \
REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
- if (sizeof (int) == sizeof (long)) \
- fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, l[0], l[1]); \
- else \
- fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
+ fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
} while (0)
/* This is how to output a `long double' extended real constant. */
#define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
do { long l[3]; \
REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
- if (sizeof (int) == sizeof (long)) \
- fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, l[0], l[1], l[2]); \
- else \
- fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
+ fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
} while (0)
/* This is how to output an assembler line defining a `float' constant. */
#define ASM_OUTPUT_FLOAT(FILE,VALUE) \
do { long l; \
REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
- if (sizeof (int) == sizeof (long)) \
- fprintf ((FILE), "%s 0x%x\n", ASM_LONG, l); \
- else \
- fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
+ fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
} while (0)
/* Store in OUTPUT a string (made with alloca) containing
#define ASM_OPERAND_LETTER '#'
#define RET return ""
-#define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
+#define AT_SP(mode) (gen_rtx_MEM ((mode), stack_pointer_rtx))
\f
/* Helper macros to expand a binary/unary operator if needed */
#define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \
""
"*
{
- operands[1] = gen_rtx (REG, HImode, REGNO (operands[1]));
+ operands[1] = gen_rtx_REG (HImode, REGNO (operands[1]));
return AS1 (push%W0,%1);
}")
if (flag_pic)
current_function_uses_pic_offset_table = 1;
- insn = emit_insn (gen_rtx (SET, SFmode, operands[0], fp_const));
+ insn = emit_insn (gen_rtx_SET (SFmode, operands[0], fp_const));
note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
if (note)
XEXP (note, 0) = operands[1];
else
- REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, operands[1], REG_NOTES (insn));
+ REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, operands[1], REG_NOTES (insn));
}
}")
if (flag_pic)
current_function_uses_pic_offset_table = 1;
- insn = emit_insn (gen_rtx (SET, DFmode, operands[0], fp_const));
+ insn = emit_insn (gen_rtx_SET (DFmode, operands[0], fp_const));
note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
if (note)
XEXP (note, 0) = operands[1];
else
- REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, operands[1], REG_NOTES (insn));
+ REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, operands[1], REG_NOTES (insn));
}
}")
if (flag_pic)
current_function_uses_pic_offset_table = 1;
- insn = emit_insn (gen_rtx (SET, XFmode, operands[0], fp_const));
+ insn = emit_insn (gen_rtx_SET (XFmode, operands[0], fp_const));
note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
if (note)
XEXP (note, 0) = operands[1];
else
- REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, operands[1], REG_NOTES (insn));
+ REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, operands[1], REG_NOTES (insn));
}
}")
if (TARGET_ZERO_EXTEND_WITH_AND)
{
xops[0] = operands[0];
- xops[1] = gen_rtx (CONST_INT, VOIDmode, 0xffff);
+ xops[1] = GEN_INT (0xffff);
if (i386_aligned_p (operands[1]))
output_asm_insn (AS2 (mov%L0,%k1,%k0),operands);
else
(const_int 0))
(set (strict_low_part (match_dup 2))
(match_dup 1))]
- "operands[2] = gen_rtx (REG, HImode, true_regnum (operands[0]));")
+ "operands[2] = gen_rtx_REG (HImode, true_regnum (operands[0]));")
(define_split
(set (match_dup 0)
(and:SI (match_dup 0)
(const_int 65535)))]
- "operands[2] = gen_rtx (REG, HImode, true_regnum (operands[0]));")
+ "operands[2] = gen_rtx_REG (HImode, true_regnum (operands[0]));")
(define_insn "zero_extendqihi2"
[(set (match_operand:HI 0 "register_operand" "=q,&q,?r")
else
{
xops[0] = operands[0];
- xops[1] = gen_rtx (CONST_INT, VOIDmode, 0xff);
+ xops[1] = GEN_INT (0xff);
output_asm_insn (AS2 (mov%B0,%1,%b0),operands);
output_asm_insn (AS2 (and%L0,%1,%k0), xops);
}
(const_int 0))
(set (strict_low_part (match_dup 2))
(match_dup 1))]
- "operands[2] = gen_rtx (REG, QImode, REGNO (operands[0]));")
+ "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));")
(define_split
(set (match_dup 0)
(and:HI (match_dup 0)
(const_int 255)))]
- "operands[2] = gen_rtx (REG, QImode, REGNO (operands[0]));")
+ "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));")
(define_split
[(set (match_operand:HI 0 "register_operand" "")
if (GET_CODE (operands[0]) != REG || GET_CODE (operands[1]) != REG
|| REGNO (operands[0]) == REGNO (operands[1]))
FAIL;
- operands[2] = gen_rtx (REG, HImode, REGNO (operands[1]));")
+ operands[2] = gen_rtx_REG (HImode, REGNO (operands[1]));")
(define_insn "zero_extendqisi2"
[(set (match_operand:SI 0 "register_operand" "=q,&q,?r")
else
{
xops[0] = operands[0];
- xops[1] = gen_rtx (CONST_INT, VOIDmode, 0xff);
+ xops[1] = GEN_INT (0xff);
output_asm_insn (AS2 (mov%B0,%1,%b0), operands);
output_asm_insn (AS2 (and%L0,%1,%k0), xops);
}
if (TARGET_ZERO_EXTEND_WITH_AND && GET_CODE (operands[1]) == REG)
{
xops[0] = operands[0];
- xops[1] = gen_rtx (CONST_INT, VOIDmode, 0xff);
- operands[1] = gen_rtx (REG, SImode, REGNO (operands[1]));
+ xops[1] = GEN_INT (0xff);
+ operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]));
output_asm_insn (AS2 (mov%L0,%1,%0), operands);
output_asm_insn (AS2 (and%L0,%1,%k0), xops);
RET;
(const_int 0))
(set (strict_low_part (match_dup 2))
(match_dup 1))]
- "operands[2] = gen_rtx (REG, QImode, REGNO (operands[0]));")
+ "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));")
(define_split
(set (match_dup 0)
(and:SI (match_dup 0)
(const_int 255)))]
- "operands[2] = gen_rtx (REG, QImode, REGNO (operands[0]));")
+ "operands[2] = gen_rtx_REG (QImode, REGNO (operands[0]));")
(define_split
[(set (match_operand:SI 0 "register_operand" "")
(set (match_dup 0)
(and:SI (match_dup 0)
(const_int 255)))]
- "operands[2] = gen_rtx (REG, SImode, true_regnum (operands[1]));")
+ "operands[2] = gen_rtx_REG (SImode, true_regnum (operands[1]));")
(define_insn "zero_extendsidi2"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?m")
if (REG_P (operands[0]) && REG_P (operands[1])
&& REGNO (operands[0]) == REGNO (operands[1]))
{
- operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
+ operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return AS2 (xor%L0,%0,%0);
}
#endif
}
- operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
+ operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
output_asm_insn (AS2 (mov%L0,%0,%1), operands);
operands[0] = GEN_INT (31);
; xops[0] = operands[0];
; xops[1] = operands[1];
; xops[2] = operands[2];
-; xops[3] = gen_rtx (MEM, SImode, stack_pointer_rtx);
+; xops[3] = gen_rtx_MEM (SImode, stack_pointer_rtx);
; output_asm_insn (\"push%z1 %1\", xops);
; output_asm_insn (AS2 (add%z3,%2,%3), xops);
; RET;
output_asm_insn (AS2 (mov%L0,%1,%0), operands);
operands[1] = operands[0];
}
- operands[1] = gen_rtx (MULT, SImode, operands[1],
- GEN_INT (1 << INTVAL (operands[2])));
+ operands[1] = gen_rtx_MULT (SImode, operands[1],
+ GEN_INT (1 << INTVAL (operands[2])));
return AS2 (lea%L0,%a1,%0);
}
}
}
else
{
- operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]));
+ operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));
if (INTVAL (operands[2]))
output_asm_insn (AS2 (ror%L0,%2,%0), operands);
output_asm_insn (AS3 (shrd%L0,%1,%3,%0), operands);
else
if (cc_prev_status.flags & CC_TEST_AX)
{
- operands[1] = gen_rtx (REG, SImode, 0);
+ operands[1] = gen_rtx_REG (SImode, 0);
operands[2] = GEN_INT (0x4000);
output_asm_insn (AS2 (testl,%2,%1), operands);
return AS1 (jne,%l0);
else
if (cc_prev_status.flags & CC_TEST_AX)
{
- operands[1] = gen_rtx (REG, SImode, 0);
+ operands[1] = gen_rtx_REG (SImode, 0);
operands[2] = GEN_INT (0x4000);
output_asm_insn (AS2 (testl,%2,%1), operands);
return AS1 (je,%l0);
if (cc_prev_status.flags & CC_TEST_AX)
{
- operands[1] = gen_rtx (REG, SImode, 0);
+ operands[1] = gen_rtx_REG (SImode, 0);
operands[2] = GEN_INT (0x4100);
output_asm_insn (AS2 (testl,%2,%1), operands);
return AS1 (je,%l0);
if (cc_prev_status.flags & CC_TEST_AX)
{
- operands[1] = gen_rtx (REG, SImode, 0);
+ operands[1] = gen_rtx_REG (SImode, 0);
operands[2] = GEN_INT (0x100);
output_asm_insn (AS2 (testl,%2,%1), operands);
return AS1 (jne,%l0);
return AS1 (je,%l0);
if (cc_prev_status.flags & CC_TEST_AX)
{
- operands[1] = gen_rtx (REG, SImode, 0);
+ operands[1] = gen_rtx_REG (SImode, 0);
operands[2] = GEN_INT (0x100);
output_asm_insn (AS2 (testl,%2,%1), operands);
return AS1 (je,%l0);
return AS1 (jb,%l0);
if (cc_prev_status.flags & CC_TEST_AX)
{
- operands[1] = gen_rtx (REG, SImode, 0);
+ operands[1] = gen_rtx_REG (SImode, 0);
operands[2] = GEN_INT (0x4100);
output_asm_insn (AS2 (testl,%2,%1), operands);
return AS1 (jne,%l0);
else
if (cc_prev_status.flags & CC_TEST_AX)
{
- operands[1] = gen_rtx (REG, SImode, 0);
+ operands[1] = gen_rtx_REG (SImode, 0);
operands[2] = GEN_INT (0x4000);
output_asm_insn (AS2 (testl,%2,%1), operands);
return AS1 (je,%l0);
else
if (cc_prev_status.flags & CC_TEST_AX)
{
- operands[1] = gen_rtx (REG, SImode, 0);
+ operands[1] = gen_rtx_REG (SImode, 0);
operands[2] = GEN_INT (0x4000);
output_asm_insn (AS2 (testl,%2,%1), operands);
return AS1 (jne,%l0);
return AS1 (jne,%l0);
if (cc_prev_status.flags & CC_TEST_AX)
{
- operands[1] = gen_rtx (REG, SImode, 0);
+ operands[1] = gen_rtx_REG (SImode, 0);
operands[2] = GEN_INT (0x4100);
output_asm_insn (AS2 (testl,%2,%1), operands);
return AS1 (jne,%l0);
return AS1 (jne,%l0);
if (cc_prev_status.flags & CC_TEST_AX)
{
- operands[1] = gen_rtx (REG, SImode, 0);
+ operands[1] = gen_rtx_REG (SImode, 0);
operands[2] = GEN_INT (0x100);
output_asm_insn (AS2 (testl,%2,%1), operands);
return AS1 (je,%l0);
return AS1 (jne,%l0);
if (cc_prev_status.flags & CC_TEST_AX)
{
- operands[1] = gen_rtx (REG, SImode, 0);
+ operands[1] = gen_rtx_REG (SImode, 0);
operands[2] = GEN_INT (0x100);
output_asm_insn (AS2 (testl,%2,%1), operands);
return AS1 (jne,%l0);
if (cc_prev_status.flags & CC_TEST_AX)
{
- operands[1] = gen_rtx (REG, SImode, 0);
+ operands[1] = gen_rtx_REG (SImode, 0);
operands[2] = GEN_INT (0x4100);
output_asm_insn (AS2 (testl,%2,%1), operands);
return AS1 (je,%l0);
value. */
emit_call_insn (TARGET_80387
- ? gen_call_value (gen_rtx (REG, XCmode, FIRST_FLOAT_REG),
- operands[0], const0_rtx)
+ ? gen_call_value (gen_rtx_REG (XCmode, FIRST_FLOAT_REG),
+ operands[0], const0_rtx)
: gen_call (operands[0], const0_rtx));
for (i = 0; i < XVECLEN (operands[2], 0); i++)
operands[3] = gen_reg_rtx (SImode);
operands[5] = addr0;
- operands[0] = gen_rtx (MEM, BLKmode, addr0);
+ operands[0] = gen_rtx_MEM (BLKmode, addr0);
}")
;; It might seem that operand 0 could use predicate register_operand.
operands[5] = addr1;
operands[6] = addr2;
- operands[1] = gen_rtx (MEM, BLKmode, addr1);
- operands[2] = gen_rtx (MEM, BLKmode, addr2);
+ operands[1] = gen_rtx_MEM (BLKmode, addr1);
+ operands[2] = gen_rtx_MEM (BLKmode, addr2);
}")
cc_status.flags |= CC_NOT_SIGNED;
- xops[0] = gen_rtx (REG, QImode, 0);
+ xops[0] = gen_rtx_REG (QImode, 0);
xops[1] = CONST0_RTX (QImode);
output_asm_insn (\"cld\", operands);