brw->no_batch_wrap = false;
- if (dri_bufmgr_check_aperture_space(&brw->batch.bo, 1)) {
+ if (drm_intel_bufmgr_check_aperture_space(&brw->batch.bo, 1)) {
if (!fail_next) {
intel_batchbuffer_reset_to_saved(brw);
intel_batchbuffer_flush(brw);
case DRI_CONF_BO_REUSE_DISABLED:
break;
case DRI_CONF_BO_REUSE_ALL:
- intel_bufmgr_gem_enable_reuse(brw->bufmgr);
+ drm_intel_bufmgr_gem_enable_reuse(brw->bufmgr);
break;
}
} vtbl;
- dri_bufmgr *bufmgr;
+ drm_intel_bufmgr *bufmgr;
drm_intel_context *hw_ctx;
brw->no_batch_wrap = false;
- if (dri_bufmgr_check_aperture_space(&brw->batch.bo, 1)) {
+ if (drm_intel_bufmgr_check_aperture_space(&brw->batch.bo, 1)) {
if (!fail_next) {
intel_batchbuffer_reset_to_saved(brw);
intel_batchbuffer_flush(brw);
* map all the BOs into the GPU at batch exec time later. If so, flush the
* batch and try again with nothing else in the batch.
*/
- if (dri_bufmgr_check_aperture_space(&brw->batch.bo, 1)) {
+ if (drm_intel_bufmgr_check_aperture_space(&brw->batch.bo, 1)) {
if (!check_aperture_failed_once) {
check_aperture_failed_once = true;
intel_batchbuffer_reset_to_saved(brw);
#include <i915_drm.h>
static void
-intel_batchbuffer_reset(struct intel_batchbuffer *batch, dri_bufmgr *bufmgr,
+intel_batchbuffer_reset(struct intel_batchbuffer *batch,
+ drm_intel_bufmgr *bufmgr,
bool has_llc);
static bool
}
void
-intel_batchbuffer_init(struct intel_batchbuffer *batch, dri_bufmgr *bufmgr,
+intel_batchbuffer_init(struct intel_batchbuffer *batch,
+ drm_intel_bufmgr *bufmgr,
bool has_llc)
{
intel_batchbuffer_reset(batch, bufmgr, has_llc);
}
static void
-intel_batchbuffer_reset(struct intel_batchbuffer *batch, dri_bufmgr *bufmgr,
+intel_batchbuffer_reset(struct intel_batchbuffer *batch,
+ drm_intel_bufmgr *bufmgr,
bool has_llc)
{
if (batch->last_bo != NULL) {
struct intel_batchbuffer;
-void intel_batchbuffer_init(struct intel_batchbuffer *batch, dri_bufmgr *bufmgr,
+void intel_batchbuffer_init(struct intel_batchbuffer *batch,
+ drm_intel_bufmgr *bufmgr,
bool has_llc);
void intel_batchbuffer_free(struct intel_batchbuffer *batch);
void intel_batchbuffer_save_state(struct brw_context *brw);
aper_array[1] = dst_buffer;
aper_array[2] = src_buffer;
- if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
+ if (drm_intel_bufmgr_check_aperture_space(aper_array, 3) != 0) {
intel_batchbuffer_flush(brw);
pass++;
} else
{
struct intel_screen *screen = sPriv->driverPrivate;
- dri_bufmgr_destroy(screen->bufmgr);
+ drm_intel_bufmgr_destroy(screen->bufmgr);
driDestroyOptionInfo(&screen->optionCache);
ralloc_free(screen);
screen->no_hw = getenv("INTEL_NO_HW") != NULL;
- screen->bufmgr = intel_bufmgr_gem_init(dri_screen->fd, BATCH_SZ);
+ screen->bufmgr = drm_intel_bufmgr_gem_init(dri_screen->fd, BATCH_SZ);
if (screen->bufmgr == NULL) {
fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
__func__, __LINE__);
brw_process_intel_debug_variable();
if (INTEL_DEBUG & DEBUG_BUFMGR)
- dri_bufmgr_set_debug(screen->bufmgr, true);
+ drm_intel_bufmgr_set_debug(screen->bufmgr, true);
if ((INTEL_DEBUG & DEBUG_SHADER_TIME) && devinfo->gen < 7) {
fprintf(stderr,
#define KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3 (1<<3)
#define KERNEL_ALLOWS_COMPUTE_DISPATCH (1<<4)
- dri_bufmgr *bufmgr;
+ drm_intel_bufmgr *bufmgr;
/**
* A unique ID for shader programs.